> -----Original Message-----
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Thursday, February 22, 2018 12:28 AM
> To: Laszlo Ersek <ler...@redhat.com>
> Cc: Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>;
> michael.d.kin...@intel.com; edk2-devel@lists.01.org;
> ard.biesheu...@linaro.org
> Subject: Re: [edk2] [PATCH edk2-platforms 01/39] Silicon/NXP: Add support
> for Big Endian Mmio APIs
> 
> On Wed, Feb 21, 2018 at 05:06:02PM +0100, Laszlo Ersek wrote:
> > On 02/21/18 16:46, Leif Lindholm wrote:
> > > Apologies for dropping the ball on this series during my sabbatical.
> > >
> > > For this particular patch, I would still like to see a core library
> > > provide the needed functionality. I just sent out an RFC of a possible
> > > implementation.
> > >
> > > Regardless, a key point is that this isn't about "big-endian", it is
> > > about endianness opposite to the executing processor.
> >
> > I commented on just this aspect under your RFC. I think I disagree, for
> > two reasons:
> >
> > - As long as the specs are LE-only, "endianness opposite to the
> > executing processor" is needless complication / speculative generality
> > in my eyes.
> 
> HTON/NTOH?
> 
> The specs are not LE-only.
> PI _is_ (at this point in time) LE-only.
> UEFI leaves this entirely to architectural bindings.
> 
> For PI, this is mentioned in a single paragraph, repeated 4 times in
> the PI 1.6 specification (due to it merging what was previously
> separate documents).
> 
> > - Even if we supported multiple endiannesses on the CPU front, the API
> > names should reflect the *device* byte order, not the CPU byte order.
> > Think of the case when the same platform device is integrated on board
> > B1 whose CPU is LE, and on board B2 whose CPU is BE.
> 
> The actual watchdog code in this series, and comments made on the
> list, suggests that there exists variants of this _device_ with BE
> or LE byte order.
> 
> If this is not the case, then yes, I agree that BE-naming makes sense.
> 
> So, Meenakshi - can you confirm that the Watchdog driver is expected
> to be used against devices in both BE and LE mode?
> 
Yes Leif,
Watchdog is BE in this series of patches and will be LE for coming SoCs.
In this series, IFC is the example which is in BE mode for LS1043 and LS1046
and LE for LS2088.

> If it is the case, maybe this library would make more sense as the
> non-standard protocol you suggested in
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fw
> ww.mail-archive.com%2Fedk2-
> devel%40lists.01.org%2Fmsg17869.html&data=02%7C01%7Cmeenakshi.aggar
> wal%40nxp.com%7C3ba61129eca0405466d508d5795d1454%7C686ea1d3bc2b
> 4c6fa92cd99c5c301635%7C0%7C0%7C636548363050169302&sdata=pIcASmlSK
> CD0jsCvEMkKk2ikjSuD19lTa8xErcxaH4Y%3D&reserved=0
> ?
> 
> > If we name the APIs
> > after the CPU byte order, then the same driver source code will be
> > misleading on one of the boards. Whereas, if we name the APIs after
> > device byte order, then the driver source code will be correct
> > regardless of board / CPU, and only the internal workings of the APIs
> > should change. For example, on a BE CPU / platform, the "normal" (LE)
> > IoLib class should be resolved to an instance that byte-swaps
> > internally, and the BE IoLib class should be resolved to an instance
> > that is transparent internally.
> 
> Right.
> 
> But that brings back the complication as to how we have a driver that
> needs an LE IO library to write output, and a BE IO library to
> manipulate the hardware.
> 
Yes it is complicated, but we have similar situation. 
> /
>     Leif
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