Use ZeroMem to initialize all fields in temporary PCI_ROOT_BRIDGE_APERTURE variables to zero. This is not mandatory but helpful for future extension: when we add new fields to PCI_ROOT_BRIDGE_APERTURE and the default value of these fields can safely be zero, this code will not suffer from an additional change.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo <heyi....@linaro.org> Cc: Maurice Ma <maurice...@intel.com> Cc: Prince Agyeman <prince.agye...@intel.com> Cc: Benjamin You <benjamin....@intel.com> Cc: Ruiyu Ni <ruiyu...@intel.com> Cc: Laszlo Ersek <ler...@redhat.com> Cc: Ard Biesheuvel <ard.biesheu...@linaro.org> --- CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c index 6d94ff72c956..c61609b79cce 100644 --- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c +++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c @@ -319,6 +319,11 @@ ScanForRootBridges ( *NumberOfRootBridges = 0; RootBridges = NULL; + ZeroMem (&Io, sizeof (Io)); + ZeroMem (&Mem, sizeof (Mem)); + ZeroMem (&MemAbove4G, sizeof (MemAbove4G)); + ZeroMem (&PMem, sizeof (PMem)); + ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G)); // // After scanning all the PCI devices on the PCI root bridge's primary bus, -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
