Read uCode from memory has better performance than from flash.
But it needs extra effort to let BSP copy uCode from flash to
memory. Also BSP already enable cache in SEC phase, so it use
less time to relocate uCode from flash to memory. After
verification, if system has more than one processor, it will
reduce some time if load uCode from memory.
This change enable this optimization.
Cc: Laszlo Ersek <ler...@redhat.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.d...@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index eec178b419..8b458a4a3a 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -1560,8 +1560,19 @@ MpInitLibInitialize (
CpuMpData->SwitchBspFlag = FALSE;
CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);
CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData +
MaxLogicalProcessorNumber);
- CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
CpuMpData->MicrocodePatchRegionSize = PcdGet64
(PcdCpuMicrocodePatchRegionSize);
+ //
+ // if platform has more than one CPU, relocate microcode to memory to reduce
loading microcode time.
+ //
+ if (MaxLogicalProcessorNumber > 1) {
+ CpuMpData->MicrocodePatchAddress = (UINT64) (UINTN) AllocatePages
(EFI_SIZE_TO_PAGES ((UINTN)CpuMpData->MicrocodePatchRegionSize));
+ if (CpuMpData->MicrocodePatchAddress != 0) {
+ CopyMem ((VOID *) (UINTN)CpuMpData->MicrocodePatchAddress, (VOID
*)(UINTN)(PcdGet64 (PcdCpuMicrocodePatchAddress)),
(UINTN)CpuMpData->MicrocodePatchRegionSize);
+ }
+ } else {
+ CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
+ }
+
InitializeSpinLock(&CpuMpData->MpLock);
//
// Save BSP's Control registers to APs
--
2.15.0.windows.1
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