According to JESD84-B50-1 chapter A.6 (documentation about eMMC4.5
standard) step "Changing the data bus width" (A.6.3) should be
execute after step "Switching to high-speed mode" (A.6.2).

This patch fixes the bus-width/clock-setting sequence
in EmmcSwitchToHighSpeed ().

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <[email protected]>
---
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c 
b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
index b3903b4..87027b8 100755
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
@@ -745,10 +745,6 @@ EmmcSwitchToHighSpeed (
   UINT8               HostCtrl1;
   UINT8               HostCtrl2;
 
-  Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth);
-  if (EFI_ERROR (Status)) {
-    return Status;
-  }
   //
   // Set to Hight Speed timing
   //
@@ -783,6 +779,11 @@ EmmcSwitchToHighSpeed (
 
   HsTiming = 1;
   Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, 
ClockFreq);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth);
 
   return Status;
 }
-- 
2.7.4

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