From: Tomasz Michalec <[email protected]> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1185
SdMmcHcReset used to set all bits of Software Reset Register to 1 including reserved ones, which on some controllers may result in timeout. Now only first bit is set, which means "Software Reset for All". Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas <[email protected]> --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 9672b5b..25771dc 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -454,11 +454,11 @@ SdMmcHcReset ( } PciIo = Private->PciIo; - SwReset = 0xFF; - Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset); + SwReset = BIT0; + Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_SW_RST, sizeof (SwReset), &SwReset); if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write full 1 fails: %r\n", Status)); + DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write SW Reset for All fails: %r\n", Status)); return Status; } @@ -467,7 +467,7 @@ SdMmcHcReset ( Slot, SD_MMC_HC_SW_RST, sizeof (SwReset), - 0xFF, + BIT0, 0x00, SD_MMC_HC_GENERIC_TIMEOUT ); -- 2.7.4 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
