Per 2c4b18e ("MdeModulePkg: Add the alignment check for FTW spare area
address and length, and add the check for PcdFlashNvStorageVariableSize
<= PcdFlashNvStorageFtwSpareSize."), FTWDxe refuses to initialize if
spare space base address or size is not aligned to block size.Depending on configuration, memory for FTWDxe might be dynamically allocated in PlatformPei. This patch makes sure that the allocated memory region is aligned. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wei Liu <[email protected]> Cc: Jordan Justen <[email protected]> Cc: Andrew Fish <[email protected]> --- OvmfPkg/PlatformPei/Platform.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index e7486b7..1d9e93f 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -287,8 +287,9 @@ ReserveEmuVariableNvStore ( // VariableStore = (EFI_PHYSICAL_ADDRESS)(UINTN) - AllocateRuntimePool ( - 2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize) + AllocateAlignedPages ( + EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)), + PcdGet32 (PcdFlashNvStorageFtwSpareSize) ); DEBUG ((EFI_D_INFO, "Reserved variable store memory: 0x%lX; size: %dkb\n", -- 1.7.10.4 ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk _______________________________________________ edk2-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/edk2-devel
