On Mon, Oct 27, 2014 at 9:09 PM, Gabriel L. Somlo <gso...@gmail.com> wrote: > Introduce macros to detect the underlying platform and access its > ACPI power management registers, based on querying the host bridge > device ID. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Gabriel Somlo <so...@cmu.edu> > --- > OvmfPkg/Include/OvmfPlatforms.h | 49 > +++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 49 insertions(+) > create mode 100644 OvmfPkg/Include/OvmfPlatforms.h > > diff --git a/OvmfPkg/Include/OvmfPlatforms.h b/OvmfPkg/Include/OvmfPlatforms.h > new file mode 100644 > index 0000000..d9207a0 > --- /dev/null > +++ b/OvmfPkg/Include/OvmfPlatforms.h > @@ -0,0 +1,49 @@ > +/** @file > + OVMF Platform (PIIX4 vs. Q35) dependent device access
How about: OVMF Platform definitions > + Copyright (c) 2014, Gabriel L. Somlo <so...@cmu.edu> > + > + This program and the accompanying materials are licensed and made > + available under the terms and conditions of the BSD License which > + accompanies this distribution. The full text of the license may > + be found at http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR > IMPLIED. > +**/ > + > +#ifndef __OVMF_PLATFORMS_H__ > +#define __OVMF_PLATFORMS_H__ > + > +#include <Library/PciLib.h> > +#include <IndustryStandard/Pci22.h> > + > +// > +// Read OVMF Host Bridge DID > +// > +#define OVMF_GET_HOSTBRIDGE_DID \ > + PciRead16 (PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)) Can you define this like the address macros below? In particular, can you remove the PciRead16 call from the .h file? (Add add it to the relevant .c files.) With these changes: Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com> > +// > +// Host Bridge Device ID (DID) values for PIIX4 and Q35/MCH > +// > +#define INTEL_82441_DEVICE_ID 0x1237 // PIIX4 > +#define INTEL_Q35_MCH_DEVICE_ID 0x29C0 // Q35 > + > +// > +// Power Management Device and Function numbers for PIIX4 and Q35/MCH > +// > +#define OVMF_PM_DEVICE_PIIX4 0x01 > +#define OVMF_PM_FUNC_PIIX4 0x03 > +#define OVMF_PM_DEVICE_Q35 0x1f > +#define OVMF_PM_FUNC_Q35 0x00 > + > +// > +// Power Management Register access for PIIX4 and Q35/MCH > +// > +#define POWER_MGMT_REGISTER_PIIX4(Offset) \ > + PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_PIIX4, OVMF_PM_FUNC_PIIX4, (Offset)) > +#define POWER_MGMT_REGISTER_Q35(Offset) \ > + PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_Q35, OVMF_PM_FUNC_Q35, (Offset)) > + > +#endif > -- > 1.9.3 > ------------------------------------------------------------------------------ _______________________________________________ edk2-devel mailing list edk2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/edk2-devel
