I pushed your patch into svn rev16325 after fixing some related build issues
and coding styles.
Thanks for your contribution.
________________________________________
From: Leif Lindholm [leif.lindh...@linaro.org]
Sent: 08 November 2014 16:21
To: edk2-devel@lists.sourceforge.net
Cc: Olivier Martin
Subject: Re: [PATCH] Increase more ARM address Pcd entries to 64-bit.
Err, and I probably should have included the platform updates in the
same patch... Ignore that patch, and please consider the below
instead:
>From 628787ae75dfb71218d6fa8551a102a0ebb95567 Mon Sep 17 00:00:00 2001
From: Leif Lindholm <leif.lindh...@linaro.org>
Date: Sat, 8 Nov 2014 10:26:53 +0000
Subject: [PATCH] Increase more ARM address Pcd entries to 64-bit.
Some AArch64 platforms have RAM and flash devices >4GB.
Update some additional Pcd entries to 64-bit, and change
the corresponding PcdGet32 calls to PcdGet64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindh...@linaro.org>
---
ArmPkg/ArmPkg.dec | 8 ++++----
.../DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c | 6 +++---
ArmPlatformPkg/ArmPlatformPkg.dec | 2 +-
.../Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c | 2 +-
.../Library/ArmVExpressSecLibRTSM/RTSMSec.c | 2 +-
.../Library/ArmVirtualizationPlatformLib/Virt.c | 4 ++--
.../Library/PlatformPeiLib/PlatformPeiLib.c | 2 +-
.../Pei/PeiArmPlatformGlobalVariableLib.c | 6 +++---
.../PrePi/PrePiArmPlatformGlobalVariableLib.c | 4 ++--
.../DebugSecExtraActionLib/DebugSecExtraActionLib.c | 10 +++++-----
ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c | 14 +++++++-------
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c | 2 +-
ArmPlatformPkg/PlatformPei/PlatformPeiLib.c | 2 +-
ArmPlatformPkg/PrePeiCore/MainMPCore.c | 4 ++--
ArmPlatformPkg/PrePeiCore/MainUniCore.c | 4 ++--
ArmPlatformPkg/PrePeiCore/PrePeiCore.c | 4 ++--
ArmPlatformPkg/Sec/Sec.c | 4 ++--
BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c | 2 +-
18 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 2a1947b..e5e7c0a 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -87,17 +87,17 @@
#
# ARM Secure Firmware PCDs
#
- gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
+ gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT64|0x00000015
gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
- gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT32|0x0000002F
+ gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT64|0x0000002F
gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030
#
# ARM Normal (or Non Secure) Firmware PCDs
#
- gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT32|0x0000002B
+ gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B
gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C
- gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D
+ gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D
gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E
#
diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c
b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c
index 9fbaeaf..5607408 100644
--- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c
+++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c
@@ -296,7 +296,7 @@ InitializeDebugAgent (
//
// Get the Sec or PrePeiCore module (defined as SEC type module)
//
- Status = GetFfsFile
((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet32(PcdSecureFvBaseAddress),
EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
+ Status = GetFfsFile
((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64(PcdSecureFvBaseAddress),
EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
if (!EFI_ERROR(Status)) {
Status = GetImageContext (FfsHeader,&ImageContext);
if (!EFI_ERROR(Status)) {
@@ -307,7 +307,7 @@ InitializeDebugAgent (
//
// Get the PrePi or PrePeiCore module (defined as SEC type module)
//
- Status = GetFfsFile
((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet32(PcdFvBaseAddress),
EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
+ Status = GetFfsFile
((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64(PcdFvBaseAddress),
EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
if (!EFI_ERROR(Status)) {
Status = GetImageContext (FfsHeader,&ImageContext);
if (!EFI_ERROR(Status)) {
@@ -318,7 +318,7 @@ InitializeDebugAgent (
//
// Get the PeiCore module (defined as PEI_CORE type module)
//
- Status = GetFfsFile
((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet32(PcdFvBaseAddress),
EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
+ Status = GetFfsFile
((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64(PcdFvBaseAddress),
EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
if (!EFI_ERROR(Status)) {
Status = GetImageContext (FfsHeader,&ImageContext);
if (!EFI_ERROR(Status)) {
diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec
b/ArmPlatformPkg/ArmPlatformPkg.dec
index 20c3c04..b9f38b6 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -70,7 +70,7 @@
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006
# Stack for CPU Cores in Non Secure Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT32|0x00000009
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
diff --git
a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c
b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c
index a0b98d0..af23025 100644
---
a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c
+++
b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c
@@ -67,5 +67,5 @@ ArmPlatformSecExtraAction (
OUT UINTN* JumpAddress
)
{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64(PcdFvBaseAddress);
}
diff --git
a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
index f5176ea..3f3b7e8 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
@@ -96,5 +96,5 @@ ArmPlatformSecExtraAction (
OUT UINTN* JumpAddress
)
{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64(PcdFvBaseAddress);
}
diff --git
a/ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c
b/ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c
index 7961b05..aa4ced4 100644
---
a/ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c
+++
b/ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c
@@ -181,9 +181,9 @@ ArmPlatformInitializeSystemMemory (
//
ASSERT (NewSize >= SIZE_128MB);
ASSERT (
- (((UINT64)PcdGet32 (PcdFdBaseAddress) +
+ (((UINT64)PcdGet64 (PcdFdBaseAddress) +
(UINT64)PcdGet32 (PcdFdSize)) <= NewBase) ||
- ((UINT64)PcdGet32 (PcdFdBaseAddress) >= (NewBase + NewSize)));
+ ((UINT64)PcdGet64 (PcdFdBaseAddress) >= (NewBase + NewSize)));
}
VOID
diff --git
a/ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c
b/ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c
index 41d506c..85bc9ea 100644
---
a/ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c
+++
b/ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c
@@ -41,7 +41,7 @@ PlatformPeim (
CopyMem (NewBase, Base, FdtSize);
PcdSet64 (PcdDeviceTreeBaseAddress, (UINT64)(UINTN)NewBase);
- BuildFvHob (PcdGet32(PcdFvBaseAddress), PcdGet32(PcdFvSize));
+ BuildFvHob (PcdGet64(PcdFvBaseAddress), PcdGet32(PcdFvSize));
return EFI_SUCCESS;
}
diff --git
a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
index df3e129..2ffbdbe 100644
---
a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
+++
b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
@@ -34,7 +34,7 @@ ArmPlatformGetGlobalVariable (
// Ensure the Global Variable Size have been initialized
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
- GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32
(PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+ GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32
(PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
if (VariableSize == 4) {
*(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase +
VariableOffset));
@@ -57,7 +57,7 @@ ArmPlatformSetGlobalVariable (
// Ensure the Global Variable Size have been initialized
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
- GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32
(PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+ GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32
(PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
if (VariableSize == 4) {
WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset),
*(UINT32*)Variable);
@@ -78,7 +78,7 @@ ArmPlatformGetGlobalVariableAddress (
// Ensure the Global Variable Size have been initialized
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
- GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32
(PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+ GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32
(PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
return (VOID*)(GlobalVariableBase + VariableOffset);
}
diff --git
a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
index 02cbb00..41af183 100644
---
a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
+++
b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
@@ -19,8 +19,8 @@
#include <Library/PcdLib.h>
#include <Library/DebugLib.h>
-#define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet64
(PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize))) || \
- ((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) <
PcdGet64 (PcdSystemMemoryBase)))
+#define IS_XIP() (((UINT32)PcdGet64 (PcdFdBaseAddress) > (UINT32)(PcdGet64
(PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize))) || \
+ ((PcdGet64 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) <
PcdGet64 (PcdSystemMemoryBase)))
// Declared by ArmPlatformPkg/PrePi Module
extern UINTN mGlobalVariableBase;
diff --git
a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
index 1e1b1ea..b09ca01 100755
--- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
+++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
@@ -35,7 +35,7 @@ NonSecureWaitForFirmware (
UINTN InterruptId;
// The secondary cores will execute the firmware once wake from WFI.
- SecondaryStart = (VOID (*)())PcdGet32 (PcdFvBaseAddress);
+ SecondaryStart = (VOID (*)())(UINTN)PcdGet64 (PcdFvBaseAddress);
ArmCallWFI ();
@@ -77,7 +77,7 @@ ArmPlatformSecExtraAction (
//
if (ArmPlatformIsPrimaryCore (MpId)) {
- UINTN* StartAddress = (UINTN*)PcdGet32(PcdFvBaseAddress);
+ UINTN* StartAddress = (UINTN*)(UINTN)PcdGet64(PcdFvBaseAddress);
// Patch the DRAM to make an infinite loop at the start address
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
@@ -85,7 +85,7 @@ ArmPlatformSecExtraAction (
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at
0x%08X ...\n\r",StartAddress);
SerialPortWrite ((UINT8 *) Buffer, CharCount);
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64(PcdFvBaseAddress);
} else {
// When the primary core is stopped by the hardware debugger to copy the
firmware
// into DRAM. The secondary cores are still running. As soon as the
first bytes of
@@ -107,7 +107,7 @@ ArmPlatformSecExtraAction (
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase),
ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
// To enter into Non Secure state, we need to make a return from
exception
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64(PcdFvBaseAddress);
} else {
// We wait for the primary core to finish to initialize the System
Memory. Otherwise the secondary
// cores would make crash the system by setting their stacks in DRAM
before the primary core has not
@@ -115,6 +115,6 @@ ArmPlatformSecExtraAction (
*JumpAddress = (UINTN)NonSecureWaitForFirmware;
}
} else {
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64(PcdFvBaseAddress);
}
}
diff --git a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
index 0214897..0e8e203 100755
--- a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
+++ b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
@@ -102,32 +102,32 @@ MemoryPeim (
);
SystemMemoryTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemoryBase) +
(EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemorySize);
- FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdBaseAddress) +
(EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdSize);
+ FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet64(PcdFdBaseAddress) +
(EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdSize);
// EDK2 does not have the concept of boot firmware copied into DRAM. To
avoid the DXE
// core to overwrite this area we must mark the region with the attribute
non-present
- if ((PcdGet32 (PcdFdBaseAddress) >= PcdGet64 (PcdSystemMemoryBase)) &&
(FdTop <= SystemMemoryTop)) {
+ if ((PcdGet64 (PcdFdBaseAddress) >= PcdGet64 (PcdSystemMemoryBase)) &&
(FdTop <= SystemMemoryTop)) {
Found = FALSE;
// Search for System Memory Hob that contains the firmware
NextHob.Raw = GetHobList ();
while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
NextHob.Raw)) != NULL) {
if ((NextHob.ResourceDescriptor->ResourceType ==
EFI_RESOURCE_SYSTEM_MEMORY) &&
- (PcdGet32(PcdFdBaseAddress) >=
NextHob.ResourceDescriptor->PhysicalStart) &&
+ (PcdGet64(PcdFdBaseAddress) >=
NextHob.ResourceDescriptor->PhysicalStart) &&
(FdTop <= NextHob.ResourceDescriptor->PhysicalStart +
NextHob.ResourceDescriptor->ResourceLength))
{
ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;
ResourceLength = NextHob.ResourceDescriptor->ResourceLength;
ResourceTop = NextHob.ResourceDescriptor->PhysicalStart +
ResourceLength;
- if (PcdGet32(PcdFdBaseAddress) ==
NextHob.ResourceDescriptor->PhysicalStart) {
+ if (PcdGet64(PcdFdBaseAddress) ==
NextHob.ResourceDescriptor->PhysicalStart) {
if (SystemMemoryTop == FdTop) {
NextHob.ResourceDescriptor->ResourceAttribute = ResourceAttributes
& ~EFI_RESOURCE_ATTRIBUTE_PRESENT;
} else {
// Create the System Memory HOB for the firmware with the
non-present attribute
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes &
~EFI_RESOURCE_ATTRIBUTE_PRESENT,
- PcdGet32(PcdFdBaseAddress),
+ PcdGet64(PcdFdBaseAddress),
PcdGet32(PcdFdSize));
// Top of the FD is system memory available for UEFI
@@ -138,11 +138,11 @@ MemoryPeim (
// Create the System Memory HOB for the firmware with the
non-present attribute
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes &
~EFI_RESOURCE_ATTRIBUTE_PRESENT,
- PcdGet32(PcdFdBaseAddress),
+ PcdGet64(PcdFdBaseAddress),
PcdGet32(PcdFdSize));
// Update the HOB
- NextHob.ResourceDescriptor->ResourceLength =
PcdGet32(PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;
+ NextHob.ResourceDescriptor->ResourceLength =
PcdGet64(PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;
// If there is some memory available on the top of the FD then
create a HOB
if (FdTop < NextHob.ResourceDescriptor->PhysicalStart +
ResourceLength) {
diff --git a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
index 587c4b5..bc1ab2f 100755
--- a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
+++ b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
@@ -116,7 +116,7 @@ InitializeMemory (
SystemMemoryBase = (UINTN)PcdGet64 (PcdSystemMemoryBase);
SystemMemoryTop = SystemMemoryBase + (UINTN)PcdGet64 (PcdSystemMemorySize);
- FdBase = (UINTN)PcdGet32 (PcdFdBaseAddress);
+ FdBase = (UINTN)PcdGet64 (PcdFdBaseAddress);
FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);
//
diff --git a/ArmPlatformPkg/PlatformPei/PlatformPeiLib.c
b/ArmPlatformPkg/PlatformPei/PlatformPeiLib.c
index 508b10d..df81286 100755
--- a/ArmPlatformPkg/PlatformPei/PlatformPeiLib.c
+++ b/ArmPlatformPkg/PlatformPei/PlatformPeiLib.c
@@ -24,7 +24,7 @@ PlatformPeim (
VOID
)
{
- BuildFvHob (PcdGet32(PcdFvBaseAddress), PcdGet32(PcdFvSize));
+ BuildFvHob (PcdGet64(PcdFvBaseAddress), PcdGet32(PcdFvSize));
return EFI_SUCCESS;
}
diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
index d40594f..a86f739 100644
--- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
@@ -131,7 +131,7 @@ PrimaryMain (
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi
Lists) is created at
// the base of the primary core stack
PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
- TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
+ TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
PpiListSize;
// Make sure the size is 8-byte aligned. Once divided by 2, the size should
be 4-byte aligned
@@ -144,7 +144,7 @@ PrimaryMain (
// Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
- SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32
(PcdFvBaseAddress);
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64
(PcdFvBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on
the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = TemporaryRamSize;
diff --git a/ArmPlatformPkg/PrePeiCore/MainUniCore.c
b/ArmPlatformPkg/PrePeiCore/MainUniCore.c
index b437ad6..6317f17 100644
--- a/ArmPlatformPkg/PrePeiCore/MainUniCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainUniCore.c
@@ -40,7 +40,7 @@ PrimaryMain (
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi
Lists) is created at
// the base of the primary core stack
PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
- TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
+ TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
PpiListSize;
// Make sure the size is 8-byte aligned. Once divided by 2, the size should
be 4-byte aligned
@@ -53,7 +53,7 @@ PrimaryMain (
// Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
- SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32
(PcdFvBaseAddress);
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64
(PcdFvBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on
the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = TemporaryRamSize;
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index 93d7e1c..43ae40d 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -53,7 +53,7 @@ CreatePpiList (
ArmPlatformGetPlatformPpiList (&PlatformPpiListSize, &PlatformPpiList);
// Copy the Common and Platform PPis in Temporrary Memory
- ListBase = PcdGet32 (PcdCPUCoresStackBase);
+ ListBase = PcdGet64 (PcdCPUCoresStackBase);
CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable));
CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList,
PlatformPpiListSize);
@@ -154,7 +154,7 @@ PrePeiCoreGetGlobalVariableMemory (
{
ASSERT (GlobalVariableBase != NULL);
- *GlobalVariableBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) +
+ *GlobalVariableBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) +
(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
(UINTN)PcdGet32 (PcdPeiGlobalVariableSize);
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 15584f1..7127395 100644
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -123,7 +123,7 @@ CEntryPoint (
copy_cpsr_into_spsr ();
// Call the Platform specific function to execute additional actions if
required
- JumpAddress = PcdGet32 (PcdFvBaseAddress);
+ JumpAddress = PcdGet64 (PcdFvBaseAddress);
ArmPlatformSecExtraAction (MpId, &JumpAddress);
NonTrustedWorldTransition (MpId, JumpAddress);
@@ -167,7 +167,7 @@ TrustedWorldInitialization (
}
// Call the Platform specific function to execute additional actions if
required
- JumpAddress = PcdGet32 (PcdFvBaseAddress);
+ JumpAddress = PcdGet64 (PcdFvBaseAddress);
ArmPlatformSecExtraAction (MpId, &JumpAddress);
// Initialize architecture specific security policy
diff --git a/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c
b/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c
index 7b0949e..2fd4c20 100644
--- a/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c
+++ b/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -125,7 +125,7 @@ LibResetSystem (
switch (ResetType) {
case EfiResetWarm:
//Perform warm reset of the system by jumping to the begining of the FV
- StartOfFv = (CALL_STUB)(UINTN)PcdGet32(PcdFvBaseAddress);
+ StartOfFv = (CALL_STUB)(UINTN)PcdGet64(PcdFvBaseAddress);
StartOfFv ();
break;
case EfiResetCold:
--
1.7.10.4
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