Sending mail on behalf of Jeff. Commit log: UefiCpuPkg/CpuExceptionHandlerLib: Use %rax instead of %eax to make code consistence
Make code consistence between ASM and S files. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> --- .../Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S index 49ef7b1..6b62f09 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S @@ -188,13 +188,13 @@ CommonInterruptEntry_al_0000: pushq %rax # for ss movzwq 32(%rbp), %rax pushq %rax # for cs - movl %ds, %eax + mov %ds, %rax pushq %rax - movl %es, %eax + mov %es, %rax pushq %rax - movl %fs, %eax + mov %fs, %rax pushq %rax - movl %gs, %eax + mov %gs, %rax pushq %rax movq %rcx, 8(%rbp) # save vector number @@ -327,9 +327,9 @@ CommonInterruptEntry_al_0000: # mov %rax, %fs ; not for fs # (X64 will not use fs and gs, so we do not restore it) popq %rax - movl %eax, %es + mov %rax, %es popq %rax - movl %eax, %ds + mov %rax, %ds popq 32(%rbp) # for cs popq 56(%rbp) # for ss -- 1.9.4.msysgit.2 ------------------------------------------------------------------------------ Download BIRT iHub F-Type - The Free Enterprise-Grade BIRT Server from Actuate! Instantly Supercharge Your Business Reports and Dashboards with Interactivity, Sharing, Native Excel Exports, App Integration & more Get technology previously reserved for billion-dollar corporations, FREE http://pubads.g.doubleclick.net/gampad/clk?id=164703151&iu=/4140/ostg.clktrk _______________________________________________ edk2-devel mailing list edk2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/edk2-devel