Reviewed-By: Olivier Martin <[email protected]> Thanks a lot Leif for this patch!
> -----Original Message----- > From: [email protected] [mailto:linaro-uefi- > [email protected]] On Behalf Of Leif Lindholm > Sent: 20 January 2015 15:47 > To: [email protected]; [email protected] > Subject: [Linaro-uefi] [PATCH] ArmPlatformPkg: detect correct pl011 > fifo depth > > pl011 releases earlier than r1p5 has a fifo depth of 16 bytes, whereas > version r1p5 upwards has a fifo depth of 32 bytes. The pl011 driver was > hardwired to 32 byte depth, causing dropped characters on some > platforms > (including default settings on FVP Base and Foundation models). > Update driver to select 16 or 32 on port initialization by checking the > component revision. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Leif Lindholm <[email protected]> > --- > ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c | 7 +++++-- > ArmPlatformPkg/Include/Drivers/PL011Uart.h | 8 ++++++++ > 2 files changed, 13 insertions(+), 2 deletions(-) > > diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > index 7e74a05..90a41ab 100644 > --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > @@ -50,12 +50,15 @@ PL011UartInitializePort ( > > LineControl = 0; > > - // The PL011 supports a buffer of either 1 or 32 chars. Therefore we > can accept > + // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we > can accept > // 1 char buffer as the minimum fifo size. Because everything can be > rounded down, > // there is no maximum fifo size. > if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) { > LineControl |= PL011_UARTLCR_H_FEN; > - *ReceiveFifoDepth = 32; > + if (PL011_UARTPID2_VER(MmioRead32 (UartBase + UARTPID2)) > > PL011_VER_R1P4) > + *ReceiveFifoDepth = 32; > + else > + *ReceiveFifoDepth = 16; > } else { > ASSERT (*ReceiveFifoDepth < 32); > // Nothing else to do. 1 byte fifo is default. > diff --git a/ArmPlatformPkg/Include/Drivers/PL011Uart.h > b/ArmPlatformPkg/Include/Drivers/PL011Uart.h > index 6675cef..2fe796f 100644 > --- a/ArmPlatformPkg/Include/Drivers/PL011Uart.h > +++ b/ArmPlatformPkg/Include/Drivers/PL011Uart.h > @@ -35,6 +35,11 @@ > #define UARTICR 0x044 > #define UARTDMACR 0x048 > > +#define UARTPID0 0xFE0 > +#define UARTPID1 0xFE4 > +#define UARTPID2 0xFE8 > +#define UARTPID3 0xFEC > + > // Data status bits > #define UART_DATA_ERROR_MASK 0x0F00 > > @@ -81,6 +86,9 @@ > #define PL011_UARTLCR_H_PEN (1 << 1) // Parity Enable > #define PL011_UARTLCR_H_BRK (1 << 0) // Send break > > +#define PL011_UARTPID2_VER(X) (((X) >> 4) & 0xF) > +#define PL011_VER_R1P4 0x2 > + > /* > > Programmed hardware of Serial port. > -- > 2.1.4 > > > _______________________________________________ > Linaro-uefi mailing list > [email protected] > http://lists.linaro.org/mailman/listinfo/linaro-uefi ------------------------------------------------------------------------------ New Year. New Location. New Benefits. New Data Center in Ashburn, VA. GigeNET is offering a free month of service with a new server in Ashburn. Choose from 2 high performing configs, both with 100TB of bandwidth. Higher redundancy.Lower latency.Increased capacity.Completely compliant. http://p.sf.net/sfu/gigenet _______________________________________________ edk2-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/edk2-devel
