The VA address space has a maximum address width of 48 bits in AArch64 state; 48 bits address width limit will provide better compatibility than 40 bits for future CPU.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo <heyi....@linaro.org> --- ArmPkg/Include/Chipset/AArch64Mmu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ArmPkg/Include/Chipset/AArch64Mmu.h b/ArmPkg/Include/Chipset/AArch64Mmu.h index 77a96ec..2398ba2 100644 --- a/ArmPkg/Include/Chipset/AArch64Mmu.h +++ b/ArmPkg/Include/Chipset/AArch64Mmu.h @@ -51,8 +51,8 @@ #define TT_ALIGNMENT_BLOCK_ENTRY BIT12 #define TT_ALIGNMENT_DESCRIPTION_TABLE BIT12 -#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFULL << 12) -#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFULL << 12) +#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFFFULL << 12) +#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFFFULL << 12) #define TT_TYPE_MASK 0x3 #define TT_TYPE_TABLE_ENTRY 0x3 -- 2.1.4 ------------------------------------------------------------------------------ One dashboard for servers and applications across Physical-Virtual-Cloud Widest out-of-the-box monitoring support with 50+ applications Performance metrics, stats and reports that give you Actionable Insights Deep dive visibility with transaction tracing using APM Insight. http://ad.doubleclick.net/ddm/clk/290420510;117567292;y _______________________________________________ edk2-devel mailing list edk2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/edk2-devel
