Hi Olivier,

I was looking into root bridge IO protocol code of ArmJuno platform.

For function:
EFI_STATUS
PciRbMemWrite (
)

You are directly calling "CpuIo->Mem.Write" with the address.

Is the mapping 1:1 in your system.

I mean for PCI memory read you are reading memory with same address, no offset 
etc.
How are the memory region mappings defined in your case?

Thanks and Regards,
Shaveta


From: Olivier Martin [mailto:olivier.mar...@arm.com]
Sent: Wednesday, May 13, 2015 8:10 PM
To: edk2-devel@lists.sourceforge.net
Subject: Re: [edk2] Query UEFI : PCIE Driver for Armv8 platform

Are lucky because I actually pushed the PCI Root Complex source code for ARM 
Juno development board R1 (Revision 1) yesterday in EDK2.
You should be able to find the code under 
ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe
I am guessing what you name 'ATU' is the logic to translate AXI bus <-> PCI 
bus. As far as I have seen so far, this logic is vendor specific.
You can see this initialization of the translation block for this PCI Root 
Complex in this file: 
ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/XPressRich3.c

From: Leekha Shaveta [mailto:shav...@freescale.com]
Sent: 13 May 2015 13:09
To: edk2-devel@lists.sourceforge.net<mailto:edk2-devel@lists.sourceforge.net>
Subject: [edk2] Query UEFI : PCIE Driver for Armv8 platform

Hi,

I was looking for PCIE driver/Root Bridge implementation for ARMv8 kind of 
platforms and have referred some code in files:

*         ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c

*         ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c

But I couldn't see ATU programming code in this implementation, AFAIK ATU 
programming is required for any outbound and inbound transaction of PCI.
How the IO translation is being done in this?
Also what is the context of "aperture" used in this code?

Kindly help in clearing these doubts.

Regards,
Shaveta


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