Certainly you could build it with 12AU7s, but more simply, a 74LS11 (or
74AC11) will do the job nicely. That has 3 3 input AND gates, and you
need only one of the 3. If you chose that device, you will need
inverters (74LS04) in addition because PTT is active low, and the inputs
of the 74LS11 will AND with active high, so you may need to invert some
inputs, and depending on what you are driving, you may have to invert
the output of the AND gate. In addition, you may need some sort of a
relay driver if the relays cannot be driven from a 5 volt logic source.
A little study into logic devices may be in order - it is not
complicated, you just have to "follow the rules".
For the 74AC11, when all 3 inputs are at a high level, the output will
be at a high level - if any of those inputs are at a low level, the
output will also be low. High level for the 74LS family is a voltage of
2 volts or greater (up to 5 volts) and a voltage of 0.8 volts or lower
for a "low" voltage. The "AC" family allows a greater range, but not as
much noise immunity for voltage between the high and low thresholds.
Joe suggested using a NOR gate which is a little different in that it
will logically AND the inputs when they are *all* at a low level and the
output will then be at a high level. Again, a little study of logic
gates may be required for those not familiar with digital logic - they
can do marvelous things if you want some conbination of signals o
produce a specific output.
73,
Don W3FPR
On 8/29/2013 7:15 PM, Ralph Parker wrote:
If you use Joe's solution where PTT is one input into an AND gate, if PTT is
not asserted, your relays will not close. All inputs to the AND gate must be
present for the output to change state.
I've wanted this 'feature request' since K3 Day 1.
Don's solution sounds like a reasonable work-around.
Unfortunately, I'm transistorially challenged.
Can I build this with a few 12AU7s ?
Ralph, VE7XF
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