Hi Group,

I have been struggling for a month to figure why I have no BFO at TP2.  Also, 
Q24 voltages measure zero all around.  The gate has a very small (10 mV peak) 
distorted version of the nice sine wave on U11's nice 1V peak sinewave.

I have traced all the way back to Control Board  U8 pin 2 where V ALC - the 
bias for the drain of Q2 - derives, and that pin never leaves zero.  U8 pin 2 
is labelled V PWR, which is the bias and control voltage for Control Board U10 
pin 3.  Then the signal "V ALC" finally is sent to the RF board from the 
emitter of Control Board Q8.

There is continuity between Control Board Q8 emitter to RF Board R98, the drain 
bias/AC decoupling resistor for Q24.  Something is dragging down the bias for 
Q24, and I simply can't figure out why using two different RF boards, and now 
two Control boards.

What would happen if I were to bias Q24 drain with a 2K or so resistor to 8 
volts and see if we can check Q24 and V ALC in general?

HELP!

Bill
NA7Y
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