On Dec 4, 11:33 pm, Raj Lamsal <[email protected]> wrote: > can electric be used for low power vlsi design i mean wheather it can > measure the power consumption at the transistor level (circuit level)
It can be used for "low-power" design if you layout the low power circuits. I don't think it can measure power consumption directly as one of the variable it depends upon is switching activity (dependent upon the input vectors). You can however do capacitance extraction. Maybe IRSIM can do dynamic power calculation since its a switch-level simulator. For large-scale circuits, you are better off estimating power at the RTL/netlist level. Transistor-level will be time-consuming (especially doing logic-simulation to determine switching activity of each gate). At the cell level, you can do Spice deck generation and use a any Spice simulator to measure power consumption of the cell. Not very practical for big circuits. Depends on your requirements/needs. -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/electricvlsi?hl=en.
