I want to develop some unusual transistor topologies. For example, Designing Analog Chips by Hans Camenzind talks about lateral PNP transistors with split connectors (see fig 1-17 page 1-23 of http://www.designinganalogchips.com/_count/countdown.pl?designinganalogchips.pdf)
Is this possible to do in Electric? What is the recommend approach? What I really want is the ability to create a new cell with a symbol and layout that allows me to define a new device type. Oliver -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/electricvlsi?hl=en.
