Sorry about that, the original library I am trying to use is attached, now. It
is the ece5410_s10.jelib, and it has a dark screen over my components region.
The tutorial_3.jelib works just fine, so far? I am not sure why.
Thanks Greg
--- On Sun, 2/21/10, Jake Baker <[email protected]> wrote:
> From: Jake Baker <[email protected]>
> Subject: Re: Dark Screen over my components region
> To: [email protected]
> Date: Sunday, February 21, 2010, 7:47 PM
> Greg, she doesn't have the original
> libraries. You need to postÂ
> 1. The original library you are trying to read
> 2. The library you referred below as the different
> library
>
> like she asked.
> Thanks, jake.
>
> On Sun, Feb 21, 2010 at 5:36 PM,
> Gregory Gatlin <[email protected]>
> wrote:
>
> The
> original library is the class library
> "ece5410_s10.jelib", the different library I use
> is the noname or default that comes up when I open Electric.
> I attached the user preferences.
>
>
>
>
> --- On Sun, 2/21/10, Gilda <[email protected]>
> wrote:
>
>
>
> > From: Gilda <[email protected]>
>
> > Subject: Re: Dark Screen over my components region
>
> > To: "Electric VLSI Editor" <[email protected]>
>
> > Date: Sunday, February 21, 2010, 5:37 PM
>
> > Greg
>
> >
>
> > Did you try the color resetting as Steve explained?
>
> >
>
> > It looks you got wrong user's preferences stored
> in one of
>
> > your
>
> > libraries. If you can, post here
>
> >
>
> > 1. The original library you are trying to read
>
> > 2. The library you referred below as the different
> library
>
> > 3. Your preferences (File -> Export -> User
>
> > Preferences
>
> >
>
> > Gilda
>
> >
>
> > --
>
> > You received this message because you are subscribed
> to the
>
> > Google Groups "Electric VLSI Editor" group.
>
> > To post to this group, send email to [email protected].
>
> > To unsubscribe from this group, send email to
>
> > [email protected].
>
> > For more options, visit this group at
> > http://groups.google.com/group/electricvlsi?hl=en.
>
> >
>
> >
>
>
>
>
>
>
>
>
>
> --
>
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> --
> http://CMOSedu.com/jbaker/jbaker.htm
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# header information:
Hece5410_s10|8.10
# Views:
Vicon|ic
Vlayout|lay
Vschematic|sch
# External Libraries:
Lspiceparts|spiceparts
# Technologies:
Tmocmos|ScaleFORmocmos()D300.0|mocmosAnalog()BT|mocmosNumberOfMetalLayers()I3
# Cell 2_1_divider;1{lay}
C2_1_divider;1{lay}||mocmos|1264643496625|1264644942580||DRC_last_good_drc_area_date()G1264643629266|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1264643629266
IR_8k_nw;1{lay}|r_8k...@0||1|0|||D5G4;
IR_8k_nw;1{lay}|r_8k...@1||1|-28|||D5G4;
Ngeneric:Facet-Center|a...@0||0|0||||AV
X
# Cell 2_1_divider_v1;1{lay}
C2_1_divider_v1;1{lay}||mocmos|1264643496625|1265394189623||DRC_last_good_drc_area_date()G1264644399347|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1264644399347
NMetal-1-Pin|p...@0||-64.5|25||||
NMetal-1-Pin|p...@1||-65.5|-70||||
Ngeneric:Invisible-Pin|p...@10||-3|-20|||||SIM_spice_card(D5G5;)S[Vin vin 0 DC
4,.tran 0 1]
NN-Well-Resistor|q|D5G1;|0|-51|79||||SCHEM_resistance(D5G5;)S8k
NN-Well-Resistor|resnw...@0||0|0|79||||SCHEM_resistance(D5G5;)S8k
AMetal-1|Vout|D5G5;||S2700|q|right|64.5|-51|resnw...@0|right|64.5|0
AMetal-1|n...@1|||S900|q|left|-65.5|-51|p...@1||-65.5|-70
AMetal-1|vin|D5G5;||S2700|resnw...@0|left|-64.5|0|p...@0||-64.5|25
Egnd||D5G5;|p...@1||G
X
# Cell 2_1_divider_v1;1{sch}
C2_1_divider_v1;1{sch}||schematic|1264644540486|1264644758384|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NGround|g...@0||12|-3||||
Ngeneric:Invisible-Pin|p...@0||1|0|||||SIM_spice_card(D5G1;)S[Vin vin 0 DC
4,.tran 0 1]
NWire_Pin|p...@1||12|6||||
NWire_Pin|p...@2||4|6||||
NResistor|resnw...@0||9|6||||3|ATTR_length(D5G0.25;X-1.5;)D120.0|ATTR_width(D5G0.5;X1.5;)D12.0|SCHEM_resistance(D5G1;)S8k
NResistor|resnw...@1||12|2|||R|3|ATTR_length(D5G0.25;X-1.5;)D120.0|ATTR_width(D5G0.5;X1.5;)D12.0|SCHEM_resistance(D5G1;)S8k
Awire|n...@1|||900|p...@1||12|6|resnw...@1|b|12|4
Awire|n...@3|||2700|g...@0||12|-1|resnw...@1|a|12|0
Awire|vin|D5G1;||0|resnw...@0|a|7|6|p...@2||4|6
Awire|vout|D5G1;||1800|resnw...@0|b|11|6|p...@1||12|6
X
# Cell 40_20_INV;1{ic}
C40_20_INV;1{ic}||artwork|1266418015067|1266418569172|E
Ngeneric:Facet-Center|a...@0||0|0||||AV
NTriangle|a...@2||0|1|6|6|RRR|
NCircle|a...@3||3.5|1|1|1||
Nschematic:Bus_Pin|p...@0||-5|1||||
Nschematic:Wire_Pin|p...@1||-3|1||||
Nschematic:Bus_Pin|p...@2||6|1|||RR|
Nschematic:Wire_Pin|p...@3||4|1|||RR|
Aschematic:wire|n...@0|||0|p...@1||-3|1|p...@0||-5|1
Aschematic:wire|n...@1|||1800|p...@3||4|1|p...@2||6|1
Ein||D5G2;|p...@0||U
Eout||D5G2;|p...@2||U
X
# Cell 40_20_INV;1{lay}
C40_20_INV;1{lay}||mocmos|1266418758378|1266419974230||DRC_last_good_drc_area_date()G1266419987356|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1266419987356
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-P-Active-Con|cont...@0||-8|-3.5|35||R|
NMetal-1-P-Active-Con|cont...@1||4|-3.5|35||R|
NMetal-1-N-Active-Con|cont...@3||-8|-45.5|15||R|
NMetal-1-N-Active-Con|cont...@4||4|-45.5|15||R|
NMetal-1-Polysilicon-1-Con|cont...@6||-10.5|-29.5||||
NN-Transistor|n...@0||-2|-45.5|17||R||SIM_spice_model(D5G3;)SNMOS
NPolysilicon-1-Pin|p...@0||-2|-25.5|||R|
Ngeneric:Invisible-Pin|p...@1||-30.5|0|||||ART_message(D5G4;)SpMos
Ngeneric:Invisible-Pin|p...@3||-29.5|-50|||||ART_message(D5G4;)SnMos
NMetal-1-Pin|p...@4||9.5|-29.5||||
NPolysilicon-1-Pin|p...@5||-2|-29.5||||
NMetal-1-Pin|p...@6||4|-29.5||||
NP-Transistor|p...@0||-2|-3.5|37||R||SIM_spice_model(D5G3;)SPMOS
NMetal-1-P-Well-Con|sub...@0||-2|-66.5|19|||
NMetal-1-N-Well-Con|w...@0||-1.5|23.5|19|1||
AP-Active|n...@5|||S1800|p...@0|diff-bottom|1.75|-4.5|cont...@1||4.5|-4.5
AP-Active|n...@6|||S0|p...@0|diff-top|-5.75|-3.5|cont...@0||-8|-3.5
APolysilicon-1|n...@7|||S900|p...@0|poly-left|-2|-25.5|p...@0||-2|-25.5
AN-Active|n...@12|||S0|n...@0|diff-top|-5.75|-45.5|cont...@3||-8|-45.5
AN-Active|n...@13|||S1800|n...@0|diff-bottom|1.75|-46.5|cont...@4||4|-46.5
AMetal-1|n...@17|||S2700|cont...@0||-8|-3.5|w...@0||-8|23.5
AMetal-1|n...@19|||S900|cont...@3||-8|-45.5|sub...@0||-8|-66.5
APolysilicon-1|n...@20|||S2700|n...@0|poly-right|-2|-33.5|p...@5||-2|-29.5
APolysilicon-1|n...@21|||S2700|p...@5||-2|-29.5|p...@0||-2|-25.5
APolysilicon-1|n...@22|||S0|p...@5||-2|-29.5|cont...@6||-10.5|-29.5
AMetal-1|n...@23||1|S900|cont...@1||4|-3.5|p...@6||4|-29.5
AMetal-1|n...@24||1|S900|p...@6||4|-29.5|cont...@4||4|-45.5
AMetal-1|n...@25||1|S1800|p...@6||4|-29.5|p...@4||9.5|-29.5
Egnd||D5G5;|sub...@0||U
Ein||D5G5;|cont...@6||U
Eout||D5G5;|p...@4||U
Evdd||D5G5;|w...@0||U
X
# Cell 40_20_INV;1{sch}
C40_20_INV;1{sch}||schematic|1266416998970|1266418015067|
I40_20_INV;1{ic}|40_20...@0||21|20|||D5G4;
Ngeneric:Facet-Center|a...@0||0|0||||AV
NOff-Page|c...@0||-15|3||||
NOff-Page|c...@1||15|3||||
NGround|g...@0||2|-7.25|-1|-1.5||
NTransistor|n...@0||0|-0.5|||R||ATTR_length(D5G0.5;RRRX0.25;Y-2;)D2.0|ATTR_width(D5G1;RRRX1;Y-2;)S20|SIM_spice_model(D5G1;RRRX-0.5;Y-3.5;)SNMOS
NTransistor|n...@1||0|7|||YR|2|ATTR_length(D5G0.5;RRRX0.25;Y-2;)D2.0|ATTR_width(D5G1;RRRX1;Y-2;)D40.0|SIM_spice_model(D5G1;RRRX-0.5;Y-3.5;)SPMOS
Ngeneric:Invisible-Pin|p...@0||-9.5|-5|||||SIM_spice_card(D5G0.5;)S[vs s 0 DC
0,vw w 0 DC 0,vg g 0 DC 0,vd d 0 DC 0,.dc vd 0 5 1m vg 0 5 1,".include
C:\\Electric\\C5_models.txt"]
Ngeneric:Invisible-Pin|p...@2||-8.5|10|||||SIM_spice_card(D5G0.5;)S[vs s 0 DC
0,vw w 0 DC 0,vg g 0 DC 0,vd d 0 DC 0,.dc vd 0 -5 -1m vg 0 -5 -1,".include
C:\\Electric\\C5_models.txt"]
NWire_Pin|p...@7||-4|-0.5||||
NWire_Pin|p...@8||-4|7||||
NWire_Pin|p...@9||-4|3||||
NWire_Pin|p...@10||2|3||||
NPower|p...@0||2|13.5||||
Awire|n...@6|||2700|n...@1|s|2|9|p...@0||2|13.5
Awire|n...@8|||900|n...@0|s|2|-2.5|g...@0||2|-6
Awire|n...@9|||0|n...@0|g|-1|-0.5|p...@7||-4|-0.5
Awire|n...@11|||1800|p...@8||-4|7|n...@1|g|-1|7
Awire|n...@12|||2700|p...@7||-4|-0.5|p...@9||-4|3
Awire|n...@13|||2700|p...@9||-4|3|p...@8||-4|7
Awire|n...@14|||0|p...@9||-4|3|c...@0|y|-13|3
Awire|n...@15|||900|n...@1|d|2|5|p...@10||2|3
Awire|n...@16|||900|p...@10||2|3|n...@0|d|2|1.5
Awire|n...@17|||1800|p...@10||2|3|c...@1|a|13|3
Ein||D5G2;|c...@0|y|U
Eout||D5G2;|c...@1|a|U
X
# Cell A1_3_HW;1{sch}
CA1_3_HW;1{sch}||schematic|1265393186291|1265508297287|
Ispiceparts:Pulse;1{ic}|pu...@1||-20|-5|||D5G4;|ATTR_DelayTime(D5G0.5;NPX-5;Y0.5;)S0ns|ATTR_FallTime(D5G0.5;NPX-5;Y-0.5;)S0|ATTR_InitialVoltage(D5G0.5;NPX-5;Y1.5;)I0|ATTR_Period(D5G0.5;NPX-5;Y-1.5;)S3ns|ATTR_PulseVoltage(D5G0.5;NPX-5;Y1;)S2V|ATTR_PulseWidth(D5G0.5;NPX-5;Y-1;)S1ns|ATTR_RiseTime(D5G0.5;NPX-5;)S0
Ngeneric:Facet-Center|a...@0||0|0||||AV
NCapacitor|c...@0||30|-2|||||SCHEM_capacitance(D5G1;X5;)S100f
NGround|g...@0||30|-22||||
NGround|g...@1||-20|-22||||
NWire_Pin|p...@0||-20|10||||
NWire_Pin|p...@1||30|10||||
Ngeneric:Invisible-Pin|p...@3||0|-5|||||SIM_spice_card(D5G2;)S[R1 Vin Vout
10k,C1 Vout 0 100f,.tran .01ps 2ns]
NResistor|r...@0||12|10|||||SCHEM_resistance(D5G1;Y-5;)S10k
Awire|Vin|D5G1;Y5;||1800|p...@0||-20|10|r...@0|a|10|10
Awire|Vout|D5G1;Y5;||1800|r...@0|b|14|10|p...@1||30|10
Awire|n...@3|||900|p...@1||30|10|c...@0|a|30|0
Awire|n...@4|||900|c...@0|b|30|-4|g...@0||30|-20
Awire|n...@10|||2700|pu...@1|plus|-20|-2|p...@0||-20|10
Awire|n...@11|||900|pu...@1|minus|-20|-8|g...@1||-20|-20
X
# Cell A1_4_HW;1{sch}
CA1_4_HW;1{sch}||schematic|1265395961797|1265576698270|
Ispiceparts:ACVoltage;1{ic}|acvol...@0||-30|13|||D5G4;|ATTR_ACVoltage(D5G0.5;NPY1;)S1V|ATTR_DCVoltage(D5G0.5;NPY1.5;)S0V|ATTR_Delay(D5G0.5;NPY-1.5;)S0|ATTR_Frequency(D5G0.5;NPY-1;)S1MEG
Ngeneric:Facet-Center|a...@0||0|0||||AV
NCapacitor|c...@0||30|8|||||SCHEM_capacitance(D5G1;X-5;)S100p
NGround|g...@0||30|-12||||
NGround|g...@1||-30|-12||||
NWire_Pin|p...@0||30|20||||
NWire_Pin|p...@1||-30|20||||
Ngeneric:Invisible-Pin|p...@2||-10|5|||||SIM_spice_card(D5G1;)S[R1 Vin Vout
10k,C1 Vout 0 100p,.ac dec 10 10k 10MEG]
NResistor|r...@0||2|20|||||SCHEM_resistance(D5G1;Y-5;)S10K
Awire|Vin|D5G1;Y-5;||0|r...@0|a|0|20|p...@1||-30|20
Awire|Vout|D5G1;Y-5;||0|p...@0||30|20|r...@0|b|4|20
Awire|n...@0|||900|c...@0|b|30|6|g...@0||30|-10
Awire|n...@1|||2700|c...@0|a|30|10|p...@0||30|20
Awire|n...@4|||900|p...@1||-30|20|acvol...@0|plus|-30|16
Awire|n...@5|||900|acvol...@0|minus|-30|10|g...@1||-30|-10
X
# Cell A1_5_HW;1{sch}
CA1_5_HW;1{sch}||schematic|1265395961797|1265509623691|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NCapacitor|c...@0||30|8|||||SCHEM_capacitance(D5G1;X-5;)S100p
NGround|g...@0||30|-12||||
NWire_Pin|p...@0||30|20||||
NWire_Pin|p...@1||-30|20||||
Ngeneric:Invisible-Pin|p...@2||-10|5|||||SIM_spice_card(D5G1;)S[Vin Vin 0 DC
SIN 0 1 1MEG 0,R1 Vin Vout 10k,C1 Vout 0 100p,.tran 1ns 3us]
NResistor|r...@0||2|20|||||SCHEM_resistance(D5G1;Y-5;)S10K
Awire|Vin|D5G1;Y-5;||0|r...@0|a|0|20|p...@1||-30|20
Awire|Vout|D5G1;Y-5;||0|p...@0||30|20|r...@0|b|4|20
Awire|n...@0|||900|c...@0|b|30|6|g...@0||30|-10
Awire|n...@1|||2700|c...@0|a|30|10|p...@0||30|20
X
# Cell A1_10HW;1{sch}
CA1_10HW;1{sch}||schematic|1265492376472|1265507201231|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NCapacitor|c...@0||30|-5|||||SCHEM_capacitance(D5G3;X-5;)S1p
NGround|g...@0||30|-20||||
NWire_Pin|p...@0||-20|20||||
NWire_Pin|p...@1||30|20||||
Ngeneric:Invisible-Pin|p...@2||-15|5|||||SIM_spice_card(D5G2;)S[Vin Vin 0 DC 0
SIN 0 0.5 20MEG,R1 Vin Vout 10k,C1 Vout 0 1p,.tran 1ns 90ns]
NResistor|r...@0||10|20|||||SCHEM_resistance(D5G3;Y-5;)S10k
Awire|Vin|D5G3;Y5;||1800|p...@0||-20|20|r...@0|b|12|20
Awire|Vout|D5G3;Y5;||1800|r...@0|b|12|20|p...@1||30|20
Awire|n...@4|||900|p...@1||30|20|c...@0|b|30|-7
Awire|n...@5|||900|c...@0|b|30|-7|g...@0||30|-18
X
# Cell A1_11HW;1{sch}
CA1_11HW;1{sch}||schematic|1265492376472|1265506837981|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NCapacitor|c...@0||0|15|||RRR||SCHEM_capacitance(D5G3;RX-5;)S1p
NGround|g...@0||30|-20||||
Ngeneric:Invisible-Pin|p...@2||-10|-5|||||SIM_spice_card(D5G2;)S[Vin Vin 0 DC 0
SIN 0 0.5 10MEG,C1 Vin Vout 1p,R1 Vout 0 10k,.tran 1ns 120ns]
NWire_Pin|p...@3||-30|15||||
NWire_Pin|p...@4||30|15||||
NResistor|r...@1||30|0|||RRR||SCHEM_resistance(D5G3;RY10;)S10K
Awire|Vin|D5G3;Y5;||0|c...@0|b|-2|15|p...@3||-30|15
Awire|Vout|D5G3;Y5;||1800|c...@0|a|2|15|p...@4||30|15
Awire|n...@1|||900|p...@4||30|15|r...@1|a|30|2
Awire|n...@2|||900|r...@1|b|30|-2|g...@0||30|-18
X
# Cell A2_6HW;1{lay}
CA2_6HW;1{lay}||mocmos|1265498917348|1265499148633||DRC_last_good_drc_area_date()G1265499199038|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265499199038
Ngeneric:Facet-Center|a...@0||0|0||||AV
NN-Well-Node|pln...@0||0|0|80|12||A
X
# Cell A2_6HWb;1{lay}
CA2_6HWb;1{lay}||mocmos|1265498917348|1265503009422||DRC_last_good_drc_area_date()G1265503024056|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265503024056
Ngeneric:Facet-Center|a...@0||0|0||||AV
NN-Well-Node|pln...@0||0|0|80|12||A
NN-Well-Node|pln...@1||0|-18|80|12||A
NN-Well-Node|pln...@2||0|-36|80|12||A
NN-Well-Node|pln...@3||0|-54|80|12||A
NN-Well-Node|pln...@4||0|-72|80|12||A
NN-Well-Node|pln...@5||0|-90|80|12||A
NN-Well-Node|pln...@6||0|-108|80|12||A
NN-Well-Node|pln...@7||0|-126|80|12||A
NN-Well-Node|pln...@8||0|-144|80|12||A
NN-Well-Node|pln...@9||0|-162|80|12||A
X
# Cell A3_5HW;1{sch}
CA3_5HW;1{sch}||schematic|1265844494096|1265851001408|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NCapacitor|c...@0||10|0|||||SCHEM_capacitance(D5G2;X5;)S400f
NGround|g...@0||10|-10||||
NWire_Pin|p...@2||10|10||||
NWire_Pin|p...@3||-20|10||||
Ngeneric:Invisible-Pin|p...@5||-10|0|||||SIM_spice_card(D5G1;)S[Vin Vin 0 DC 0
AC 2 PULSE(0 1 0 10p 10p 1n 2n),VGND GND 0 DC 0,.options post,.tran 1ps 3ns]
NResistor|r...@0||-10|10|||||SCHEM_resistance(D5G2;Y5;)S10
Awire|Vin|D5G2;Y5;||0|r...@0|a|-12|10|p...@3||-20|10
Awire|Vout|D5G2;Y5;||1800|r...@0|b|-8|10|p...@2||10|10
Awire|n...@2|||900|p...@2||10|10|c...@0|a|10|2
Awire|n...@3|||900|c...@0|b|10|-2|g...@0||10|-8
X
# Cell A3_8HW;1{sch}
CA3_8HW;1{sch}||schematic|1265851428173|1265851915470|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NCapacitor|c...@0||15|0|||||SCHEM_capacitance(D5G2;X5;)S10p
NGround|g...@0||15|-10||||
NWire_Pin|p...@0||15|10||||
NWire_Pin|p...@1||-15|10||||
Ngeneric:Invisible-Pin|p...@2||-5|0|||||SIM_spice_card(D5G1;)S[Vin Vin 0 DC 0
AC 2 PULSE(0 1 0 100p 100p 10n 20n),VGND GND 0 DC 0,.options post,.tran 1ps
30ns]
NResistor|r...@0||-5|10|||||SCHEM_resistance(D5G2;Y5;)S1k
Awire|Vin|D5G2;Y5;||0|r...@0|a|-7|10|p...@1||-15|10
Awire|Vout|D5G2;Y5;||1800|r...@0|b|-3|10|p...@0||15|10
Awire|n...@0|||900|p...@0||15|10|c...@0|a|15|2
Awire|n...@1|||900|c...@0|b|15|-2|g...@0||15|-8
X
# Cell A4_3HW;1{lay}
CA4_3HW;1{lay}||mocmos|1266280182132|1266547490205||DRC_last_good_drc_area_date()G1266547497148|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1266547497148
NP-Active-Resistor|P_active_resistor|D5G3;|0|0|39|7|||SCHEM_resistance(D5G3;Y3;)S50
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-Pin|gnd|D5G3;|87|0||||
NMetal-1-Pin|p...@0||-75|0||||
NMetal-1-Pin|vdd|D5G4;|2|-36||||
NMetal-1-N-Well-Con|w...@0||2|-14|31|||
AMetal-1|n...@1|||S1800|P_active_resistor|right|44.5|0|gnd||87|0
AMetal-1|n...@2|||S900|w...@0||2|-14|vdd||2|-36
AMetal-1|vin|D5G3;||S0|P_active_resistor|left|-44.5|0|p...@0||-75|0
X
# Cell A_1_1;2{sch}
CA_1_1;2{sch}||schematic|1264040404638|1265386594258|
Ispiceparts:DCCurrent;1{ic}|dccur...@0||10|-3|||D5G4;|ATTR_DCCurrent(D5G0.5;NP)S5uA
Ispiceparts:DCVoltage;1{ic}|dcvol...@0||-3|-2.5|||D5G4;|ATTR_Voltage(D5G0.5;NP)S1
Ngeneric:Facet-Center|a...@0||0|0||||AV
NGround|g...@0||14.5|-9.5|-1|-1||
NGround|g...@1||-3|-8|-1|-1||
NGround|g...@2||10|-9|-1|-1||
NWire_Pin|p...@0||14.5|2||||
NWire_Pin|p...@3||-3|2||||
Ngeneric:Invisible-Pin|p...@4||3.5|-4.5|||||SIM_spice_card(D5G1;)S.op
NWire_Pin|p...@7||10|2||||
NResistor|r...@0||5|2|||||SCHEM_resistance(D5G1;Y1;)S1m
NResistor|r...@1||14.5|-2|||R||SCHEM_resistance(D5G1;RRRY-2.5;)S1m
Awire|Vin|D5G1;Y1;||0|r...@0|a|3|2|p...@3||-3|2
Awire|Vx|D5G1;X4;Y1;||1800|p...@7||10|2|p...@0||14.5|2
Awire|n...@5|||2700|r...@1|b|14.5|0|p...@0||14.5|2
Awire|n...@7|||2700|dcvol...@0|plus|-3|1|p...@3||-3|2
Awire|n...@8|||2700|g...@1||-3|-6.5|dcvol...@0|minus|-3|-6
Awire|n...@13|||1800|r...@0|b|7|2|p...@7||10|2
Awire|n...@14|||2700|dccur...@0|plus|10|0|p...@7||10|2
Awire|n...@15|||2700|g...@0||14.5|-8|r...@1|a|14.5|-4
Awire|n...@19|||2700|g...@2||10|-7.5|dccur...@0|minus|10|-6
X
# Cell A_1_1;1{sch}
CA_1_1;1{sch}||schematic|1264040404638|1264041123948|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NGround|g...@0||10|-7.5|-1|-1||
NWire_Pin|p...@0||10|2||||
NWire_Pin|p...@3||-3|2||||
Ngeneric:Invisible-Pin|p...@4||3.5|-3|||||SIM_spice_card(D5G1;)S[Vin Vin 0 DC
1,Ix Vx 0 DC 5u,.op]
NResistor|r...@0||4.5|2|||||SCHEM_resistance(D5G1;Y1;)S1MEG
NResistor|r...@1||10|-2|||R||SCHEM_resistance(D5G1;RRRY-2.5;)S1MEG
Awire|Vin|D5G1;Y1;||0|r...@0|a|2.5|2|p...@3||-3|2
Awire|Vx|D5G1;Y1;||1800|r...@0|b|6.5|2|p...@0||10|2
Awire|n...@5|||2700|r...@1|b|10|0|p...@0||10|2
Awire|n...@6|||2700|g...@0||10|-6|r...@1|a|10|-4
X
# Cell Fig2_19;1{sch}
CFig2_19;1{sch}||schematic|1181931511312|1206202044802|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NDiode|diode|D5G1;X-2.75;Y1;|-0.25|-2.5|||RR||SCHEM_diode(D5G1;Y-0.25;)S""
NGround|g...@0||-0.25|-9.25||||
Ngeneric:Invisible-Pin|p...@0||-15.5|-1.75|||||SIM_spice_card(D5G0.75;)S[Vgnd
gnd 0 DC 0,Vin Vin 0 DC 0 PULSE 10 -10 10n 0.1n 0.1n 20n 40n,.model diode D
is=1e-15 tt=10E-9 cj0=1e-12 vj=0.7 m=0.33,.tran 10p 25n,.options post]
NWire_Pin|p...@1||-0.25|2.75||||
NWire_Pin|p...@2||-21.25|2.75||||
Ngeneric:Invisible-Pin|p...@3||-11.25|7.75|||||ART_message(D5G1;)SPlot Vin,VD
and ID
NResistor|r...@0||-11.25|2.75|||||SCHEM_resistance(D5G2;Y1.5;)S1k
Awire|D1|D5G1;X2.25;Y-3.25;||900|p...@1||-0.25|2.75|diode|b|-0.25|-0.5
Awire|VD|D5G2;X2;Y1;||1800|r...@0|b|-9.25|2.75|p...@1||-0.25|2.75
Awire|Vin|D5G2;X-5.5;Y1;||0|r...@0|a|-13.25|2.75|p...@2||-21.25|2.75
Awire|n...@0|||2700|g...@0||-0.25|-7.25|diode|a|-0.25|-4.5
X
# Cell Fig2_23;1{sch}
CFig2_23;1{sch}||schematic|1181931521046|1228428660890|
ITRC;2{ic}|O1|D5G4;X-5.5;Y-1;|-11|-1.25|||D5G4;
Ngeneric:Facet-Center|a...@0||0|0||||AV
NGround|g...@0||-23|-9||||
NGround|g...@1||-0.25|-9||||
NGround|g...@2||8.75|-13||||
Ngeneric:Invisible-Pin|p...@0||-28.25|7.25|||||SIM_spice_card(D5G1;)S[Vgnd gnd
0 DC 0,.model TRC ltra R=5k C=5f len=50,Vin Vin 0 DC 0 PULSE 0 1 5n,.tran 10p
100n,.options post]
Ngeneric:Invisible-Pin|p...@1||-11|7.5|||||ART_message(D5G2;)SPlot Vin and Vout
NWire_Pin|p...@4||-28.25|1.75||||
NWire_Pin|p...@5||8.75|1.5||||
NWire_Pin|p...@7||-2|1.5||||
NWire_Pin|p...@10||-0.25|-6.25||||
NWire_Pin|p...@11||-23|-6.25||||
NResistor|r...@0||8.75|-4.5|||R||SCHEM_resistance(D5G2;Y-2.5;)S1G
Awire|Vin|D5G1;Y0.75;||1800|p...@4||-28.25|1.75|O1|a|-20|1.75
Awire|Vout|D5G1;Y0.75;||0|p...@5||8.75|1.5|p...@7||-2|1.5
Awire|n...@0|||2700|r...@0|b|8.75|-2.5|p...@5||8.75|1.5
Awire|n...@2|||900|r...@0|a|8.75|-6.5|g...@2||8.75|-11
Awire|n...@33|||900|O1|b|-2|1.75|p...@7||-2|1.5
Awire|n...@34|||2700|g...@1||-0.25|-7|p...@10||-0.25|-6.25
Awire|n...@35|||0|p...@10||-0.25|-6.25|O1|gndR|-3|-6.25
Awire|n...@36|||0|O1|gndL|-19|-6.25|p...@11||-23|-6.25
Awire|n...@37|||900|p...@11||-23|-6.25|g...@0||-23|-7
X
# Cell NMOS_20_2;1{lay}
CNMOS_20_2;1{lay}||mocmos|1266416629650|1266416653854|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-N-Active-Con|cont...@0||2|12|15|||
NMetal-1-N-Active-Con|cont...@1||2|0|15|||
NMetal-1-Polysilicon-1-Con|cont...@2||-16|6||||
NMetal-1-Pin|d|D5G5;|37|12||||
NMetal-1-Pin|g|D5G5;|-35|6||||
NN-Transistor|n...@0||2|6|17||||SIM_spice_model(D5G3;)SNMOS
Ngeneric:Invisible-Pin|p...@0||-26|13|||||ART_message(D5G4;)SnMos
NMetal-1-Pin|s|D5G5;|37|0||||
NMetal-1-P-Well-Con|sub...@0||2|-12|15|||
NMetal-1-Pin|w|D5G5;|2|-22||||
AMetal-1|n...@0|||S0|cont...@2||-16|6|g||-35|6
AMetal-1|n...@1|||S1800|cont...@0||2|12|d||37|12
AMetal-1|n...@2|||S1800|cont...@1||2|0|s||37|0
AN-Active|n...@3|||S2700|n...@0|diff-top|2|9.75|cont...@0||2|12
AN-Active|n...@4|||S900|n...@0|diff-bottom|1|2.25|cont...@1||1|0
APolysilicon-1|n...@5|||S0|n...@0|poly-left|-10|6|cont...@2||-16|6
AMetal-1|n...@6|||S900|sub...@0||2|-12|w||2|-22
X
# Cell PMOS_40_2;1{lay}
CPMOS_40_2;1{lay}||mocmos|1266416731136|1266416736308|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-P-Active-Con|cont...@0||2|-16|35|||
NMetal-1-Polysilicon-1-Con|cont...@1||-26|-10||||
NMetal-1-P-Active-Con|cont...@2||2|-4|35|||
NMetal-1-Pin|d|D5G5;|49|-16||||
NMetal-1-Pin|g|D5G5;|-40|-10||||
NPolysilicon-1-Pin|p...@0||-20|-10||||
Ngeneric:Invisible-Pin|p...@1||-33|-19|||||ART_message(D5G4;)SpMos
NP-Transistor|p...@0||2|-10|37||||SIM_spice_model(D5G3;)SPMOS
NMetal-1-Pin|s|D5G5;|47|-4||||
NMetal-1-Pin|w|D5G5;|0|26||||
NMetal-1-N-Well-Con|w...@0||0|7|35|1||
AMetal-1|n...@0|||S1800|cont...@0||2|-16|d||49|-16
AMetal-1|n...@1|||S0|cont...@1||-26|-10|g||-40|-10
AP-Active|n...@2|||S900|p...@0|diff-bottom|1|-13.75|cont...@0||1|-16.5
AP-Active|n...@3|||S2700|p...@0|diff-top|2|-6.25|cont...@2||2|-4
APolysilicon-1|n...@4|||S900|p...@0|poly-left|-20|-10|p...@0||-20|-10
APolysilicon-1|n...@5|||S1800|cont...@1||-26|-10|p...@0||-20|-10
APolysilicon-1|n...@6|||S0|cont...@1||-26|-10|cont...@1||-26|-10
AMetal-1|n...@7|||S2700|w...@0||0|7|w||0|26
AMetal-1|n...@8|||S1800|cont...@2||2|-4|s||47|-4
X
# Cell R_8k_nw;1{lay}
CR_8k_nw;1{lay}||mocmos|1264470638170|1264643405078||DRC_last_good_drc_area_date()G1264471956928|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1264643629266
Ngeneric:Facet-Center|a...@0||0|0||||AV
NN-Well-Node|pln...@0||0|0|120|12||A
X
# Cell TRC;2{ic}
CTRC;2{ic}||artwork|1181325801208|1265394037370|E|ATTR_SPICE_template(D5G1;NTX-2;Y7.5;)S$(node_name)
$(a) $(gndL) $(b) $(gndR) TRC
Ngeneric:Facet-Center|a...@0||0|0||||AV
NOpened-Polygon|a...@1||0|3|18|6|||trace()V[-9/0,-7.75/-3,-7.75/-3,-6/3,-4/-3,-2/3,0/-3,2/3,4/-3,6/3,8/-3,9/0]
NPin|p...@0||-1.5|-3.75|1|1||
NPin|p...@1||1.5|-3.75|1|1||
Nschematic:Wire_Pin|p...@2||-9|3||||
Nschematic:Wire_Pin|p...@3||9|3||||
Nschematic:Wire_Pin|p...@4||-8|-5||||
Nschematic:Wire_Pin|p...@5||8|-5||||
NPin|p...@8||-8.5|0|1|1||
NPin|p...@9||8.5|0|1|1||
NPin|p...@10||0|-2.5|1|1||
NPin|p...@11||0|0|1|1||
NPin|p...@12||-1.5|-2.5|1|1||
NPin|p...@13||1.5|-2.5|1|1||
NPin|p...@14||-1.5|-6.75|1|1||
NPin|p...@15||0|-8.5|1|1||
NPin|p...@16||1.5|-6.75|1|1||
NPin|p...@17||0|-6.75|1|1||
NPin|p...@18||0|-3.75|1|1||
NPin|p...@19||0|-5|1|1||
NPin|p...@20||-8|-5|1|1||
NPin|p...@21||8|-5|1|1||
AThicker|n...@0|||FS1800|p...@11||0|0|p...@9||8.5|0
AThicker|n...@1|||FS1800|p...@8||-8.5|0|p...@11||0|0
AThicker|n...@2|||FS2700|p...@10||0|-2.5|p...@11||0|0
ASolid|n...@3|||FS1800|p...@12||-1.5|-2.5|p...@13||1.5|-2.5
ASolid|n...@4|||FS1800|p...@18||0|-3.75|p...@1||1.5|-3.75
AThicker|n...@7|||FS1306|p...@14||-1.5|-6.75|p...@15||0|-8.5
AThicker|n...@8|||FS2294|p...@15||0|-8.5|p...@16||1.5|-6.75
AThicker|n...@10|||FS1800|p...@17||0|-6.75|p...@16||1.5|-6.75
AThicker|n...@11|||FS1800|p...@14||-1.5|-6.75|p...@17||0|-6.75
ASolid|n...@12|||FS1800|p...@0||-1.5|-3.75|p...@18||0|-3.75
AThicker|n...@13|||FS2700|p...@17||0|-6.75|p...@19||0|-5
AThicker|n...@14|||FS2700|p...@19||0|-5|p...@18||0|-3.75
AThicker|n...@15|||FS0|p...@19||0|-5|p...@20||-8|-5
AThicker|n...@16|||FS1800|p...@19||0|-5|p...@21||8|-5
Ea||D5G2;|p...@2||U
Eb||D5G2;|p...@3||U
EgndL||D5G2;|p...@4||G
EgndR||D5G2;|p...@5||G
X
# Cell diode_rd_example;1{sch}
Cdiode_rd_example;1{sch}||schematic|1181931511312|1265076532161|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NDiode|diode|D5G1;X-2.75;Y1;|-0.25|-2.5|||RR||SCHEM_diode(D5G1;Y-0.25;)S""
NGround|g...@0||-0.25|-9.25||||
Ngeneric:Invisible-Pin|p...@0||-15.5|-1.75|||||SIM_spice_card(D5G0.75;)S[Vin
Vin 0 DC 10.7 AC 1m,.model diode D,.ac dec 100 1 100]
NWire_Pin|p...@1||-0.25|2.75||||
NWire_Pin|p...@2||-21.25|2.75||||
Ngeneric:Invisible-Pin|p...@3||-11.25|7.75|||||ART_message(D5G1;)SPlot Vin,VD
and ID
NResistor|r...@0||-11.25|2.75|||||SCHEM_resistance(D5G2;Y1.5;)S1k
Awire|D1|D5G1;X2.25;Y-3.25;||900|p...@1||-0.25|2.75|diode|b|-0.25|-0.5
Awire|VD|D5G2;X2;Y1;||1800|r...@0|b|-9.25|2.75|p...@1||-0.25|2.75
Awire|Vin|D5G2;X-5.5;Y1;||0|r...@0|a|-13.25|2.75|p...@2||-21.25|2.75
Awire|n...@0|||2700|g...@0||-0.25|-7.25|diode|a|-0.25|-4.5
X
# Cell junk;1{lay}
Cjunk;1{lay}||mocmos|1265077078911|1265394189623||DRC_last_good_drc_area_date()G1265077625809|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265077625809
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-Metal-2-Con|cont...@0||-102|3||||
NMetal-1-Metal-2-Con|cont...@1||-84|3||||
NMetal-2-Metal-3-Con|cont...@2||-99|21||||
NMetal-1-Metal-2-Con|cont...@3||-114|12||1||
NMetal-2-Metal-3-Con|cont...@4||-114|12||||
NMetal-2-Pin|p...@6||-84|20||||
NMetal-2-Pin|p...@7||-99|20||||
NMetal-3-Pin|p...@8||-113|12||||
NMetal-1-Pin|p...@9||-114|30||||
AMetal-2|n...@5|||S900|p...@6||-84|20|cont...@1||-84|3
AMetal-2|n...@6|||S0|p...@6||-84|20|p...@7||-99|20
AMetal-2|n...@7||3|S900|cont...@2||-99|21|p...@7||-99|20
AMetal-2|n...@8|||S2700|cont...@3||-114|12|cont...@4||-114|12
AMetal-1|n...@9|||S900|p...@9||-114|30|cont...@3||-114|12
AMetal-3|n...@10|||S0|p...@8||-113|12|cont...@4||-114|12
AMetal-1|n...@11||1|S1800|cont...@0||-102|3|cont...@1||-84|3
X
# Cell metal1_junk;1{lay}
Cmetal1_junk;1{lay}||mocmos|1265076951005|1265077057360|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-Pin|p...@0||-12|1||||
NMetal-1-Pin|p...@1||13|1||||
AMetal-1|n...@0|||S1800|p...@0||-12|1|p...@1||13|1
EIn||D5G2;|p...@0||U
X
# Cell n_well;1{lay}
Cn_well;1{lay}||mocmos|1264470638170|1264471955642||DRC_last_good_drc_area_date()G1264471956928|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1264471956928
Ngeneric:Facet-Center|a...@0||0|0||||AV
NN-Well-Node|pln...@0||0|0|120|12||A
NN-Well-Node|pln...@1||0|-18|120|12||A
X
# Cell pad;1{lay}
Cpad;1{lay}||mocmos|1265077157948|1265078317819||DRC_last_good_drc_area_date()G1265739336453|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1265739336453
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-2-Metal-3-Con|cont...@0||0|0|244|244||
NPassivation-Node|pln...@0||0|0|200|200||
Einout||D5G25;|cont...@0||U
X
# Cell pad;1{sch}
Cpad;1{sch}||schematic|1265077533472|1265077554396|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NOff-Page|c...@0||0|0||||
Einout||D5G2;|c...@0|a|U
X
# Cell welcome;1{lay}
Cwelcome;1{lay}||mocmos|1225555651218|1257524952031|
Ngeneric:Facet-Center|a...@0||0|0||||AV
Ngeneric:Invisible-Pin|p...@0||0|0|||||ART_message(D5G4;)S[Welcome to ECE
5/410,Spring 2010]
X
# header information:
Htutorial_3|8.10
# Views:
Vicon|ic
Vlayout|lay
Vschematic|sch
# Technologies:
Tmocmos|ScaleFORmocmos()D300.0|mocmosAnalog()BT|mocmosNumberOfMetalLayers()I3
# Cell NMOS_20_2;1{lay}
CNMOS_20_2;1{lay}||mocmos|1266415194607|1266415261155|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-N-Active-Con|cont...@0||1|11|15|||
NMetal-1-N-Active-Con|cont...@1||1|-1|15|||
NMetal-1-Polysilicon-1-Con|cont...@2||-17|5||||
NMetal-1-Pin|d|D5G5;|36|11||||
NMetal-1-Pin|g|D5G5;|-36|5||||
NN-Transistor|n...@0||1|5|17||||SIM_spice_model(D5G3;)SNMOS
Ngeneric:Invisible-Pin|p...@1||-27|12|||||ART_message(D5G4;)SnMos
NMetal-1-Pin|s|D5G5;|36|-1||||
NMetal-1-P-Well-Con|sub...@0||1|-13|15|||
NMetal-1-Pin|w|D5G5;|1|-23||||
AMetal-1|n...@0|||S0|cont...@2||-17|5|g||-36|5
AMetal-1|n...@1|||S1800|cont...@0||1|11|d||36|11
AMetal-1|n...@2|||S1800|cont...@1||1|-1|s||36|-1
AN-Active|n...@3|||S2700|n...@0|diff-top|1|8.75|cont...@0||1|11
AN-Active|n...@4|||S900|n...@0|diff-bottom|0|1.25|cont...@1||0|-1
APolysilicon-1|n...@5|||S0|n...@0|poly-left|-11|5|cont...@2||-17|5
AMetal-1|n...@6|||S900|sub...@0||1|-13|w||1|-23
X
# Cell NMOS_IV;1{lay}
CNMOS_IV;1{lay}||mocmos|1262621562953|1266291135256||DRC_last_good_drc_area_date()G1266291142730|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1266291142730
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-N-Active-Con|cont...@0||1.5|-4.5|5|||
NMetal-1-N-Active-Con|cont...@1||1.5|6|5|||
NMetal-1-Polysilicon-1-Con|cont...@2||-12|1||||
NN-Transistor|n...@0||1.5|1|17||||SIM_spice_model(D5G1;)SNMOS
NN-Active-Pin|p...@0||1.5|-2.75||||
NMetal-1-Pin|p...@1||1.5|-25.5||||
NMetal-1-Pin|p...@2||-22|1||||
NMetal-1-Pin|p...@3||22|6||||
NMetal-1-Pin|p...@4||22|-4.5||||
Ngeneric:Invisible-Pin|p...@5||-22.5|-13|||||SIM_spice_card(D5G2;)S[vs s 0 DC
0,vw w 0 DC 0,vg g 0 DC 0,vd d 0 DC 0,.dc vd 0 5 1m vg 0 5 1,".include
C:\\Electric\\C5_models.txt"]
NMetal-1-P-Well-Con|sub...@0||1.5|-16.5|5|||
AN-Active|n...@0|||S2700|n...@0|diff-top|1.5|4.75|cont...@1||1.5|6
AN-Active|n...@1||7|IJS2700|cont...@0||1.5|-4.5|p...@0||1.5|-2.75
AN-Active|n...@2|||S1800|n...@0|diff-bottom|1.5|-2.75|p...@0||1.5|-2.75
APolysilicon-1|n...@3|||S0|n...@0|poly-left|-10.5|1|cont...@2||-12|1
AMetal-1|n...@4|||S900|sub...@0||1.5|-16.5|p...@1||1.5|-25.5
AMetal-1|n...@5||1|S0|cont...@2||-12|1|p...@2||-22|1
AMetal-1|n...@6||1|S1800|cont...@1||1.5|6|p...@3||22|6
AMetal-1|n...@7||1|S1800|cont...@0||1.5|-4.5|p...@4||22|-4.5
Edrain|d|D5G2;|p...@3||U
Egate|g|D5G2;|p...@2||U
Egnd||D5G2;|p...@1||U
Esource|s|D5G2;|p...@4||U
X
# Cell NMOS_IV;2{sch}
CNMOS_IV;2{sch}||schematic|1262550763796|1266291063840|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NGround|g...@0||9|-0.25|-1|-1.5||
N4-Port-Transistor|nmo...@0||1|2.5|||R||ATTR_length(D5G0.5;RRRX0.25;Y-2;)D2.0|ATTR_width(D5G1;RRRX1;Y-2;)S20|SIM_spice_model(D5G1;RRRX-0.5;Y-3.5;)SNMOS
Ngeneric:Invisible-Pin|p...@0||-2|-2|||||SIM_spice_card(D5G0.5;)S[vs s 0 DC
0,vw w 0 DC 0,vg g 0 DC 0,vd d 0 DC 0,.dc vd 0 5 1m vg 0 5 1,".include
C:\\Electric\\C5_models.txt"]
NWire_Pin|p...@1||9|1.5||||
NWire_Pin|p...@2||3|-1||||
NWire_Pin|p...@3||-1.5|2.5||||
NWire_Pin|p...@4||3|7||||
Awire|n...@0|||1800|nmo...@0|b|3|1.5|p...@1||9|1.5
Awire|n...@1|||900|p...@1||9|1.5|g...@0||9|1
Awire|n...@2|||900|nmo...@0|s|3|0.5|p...@2||3|-1
Awire|n...@3|||0|nmo...@0|g|0|2.5|p...@3||-1.5|2.5
Awire|n...@4|||2700|nmo...@0|d|3|4.5|p...@4||3|7
Ed||D5G2;|p...@4||U
Eg||D5G2;|p...@3||U
Es||D5G2;|p...@2||U
X
# Cell PMOS_40_2;2{lay}
CPMOS_40_2;2{lay}||mocmos|1266416682088|1266416682088|
Ngeneric:Facet-Center|a...@0||0|0||||AV
X
# Cell PMOS_IV;1{lay}
CPMOS_IV;1{lay}||mocmos|1262621548187|1262634046828||DRC_last_good_drc_area_date()G1262635792969|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1262635792969
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-P-Active-Con|cont...@0||0|10|5|||
NMetal-1-P-Active-Con|cont...@1||0|-1|5|||
NMetal-1-Polysilicon-1-Con|cont...@2||-15|4.5||||
NMetal-1-Pin|p...@0||-25|4.5||||
NMetal-1-Pin|p...@1||0|31.5||||
NMetal-1-Pin|p...@2||21.5|10||||
NMetal-1-Pin|p...@3||22|-1||||
Ngeneric:Invisible-Pin|p...@4||-27|21.5|||||SIM_spice_card(D5G2;)S[vs s 0 DC
0,vw w 0 DC 0,vg g 0 DC 0,vd d 0 DC 0,.dc vd 0 -5 -1m vg 0 -5 -1,".include
C:\\Electric\\C5_models.txt"]
NP-Transistor|p...@0||0|4.5|7||||SIM_spice_model(D5G1;)SPMOS
NMetal-1-N-Well-Con|w...@0||0|22|5|||
APolysilicon-1|n...@0|||S1800|cont...@2||-15|4.5|p...@0|poly-left|-7|4.5
AP-Active|n...@1|||S2700|p...@0|diff-top|-2|8.25|cont...@0||-2|10.5
AP-Active|n...@2|||S900|p...@0|diff-bottom|-1|0.75|cont...@1||-1|-1.5
AMetal-1|n...@3||1|S0|cont...@2||-15|4.5|p...@0||-25|4.5
AMetal-1|n...@4|||S2700|w...@0||0|22|p...@1||0|31.5
AMetal-1|n...@5||1|S1800|cont...@0||0|10|p...@2||21.5|10
AMetal-1|n...@6||1|S1800|cont...@1||0|-1|p...@3||22|-1
Ed||D5G2;|p...@3||U
Eg||D5G2;|p...@0||U
Es||D5G2;|p...@2||U
Ew||D5G2;|p...@1||U
X
# Cell PMOS_IV;1{sch}
CPMOS_IV;1{sch}||schematic|1262554778546|1262637363843|
Ngeneric:Facet-Center|a...@0||0|0||||AV
N4-Port-Transistor|nmo...@0||1.5|2|||YR|2|ATTR_length(D5G0.5;RRRX0.25;Y-2;)D2.0|ATTR_width(D5G1;RRRX1;Y-2;)D10.0|SIM_spice_model(D5G1;RRRX-0.5;Y-3.5;)SPMOS
Ngeneric:Invisible-Pin|p...@0||-1.5|5.5|||||SIM_spice_card(D5G0.5;)S[vs s 0 DC
0,vw w 0 DC 0,vg g 0 DC 0,vd d 0 DC 0,.dc vd 0 -5 -1m vg 0 -5 -1,".include
C:\\Electric\\C5_models.txt"]
NWire_Pin|p...@1||3.5|6||||
NWire_Pin|p...@2||-2|2||||
NWire_Pin|p...@3||7.5|3||||
NWire_Pin|p...@4||3.5|-1||||
Awire|n...@0|||2700|nmo...@0|s|3.5|4|p...@1||3.5|6
Awire|n...@1|||0|nmo...@0|g|0.5|2|p...@2||-2|2
Awire|n...@2|||1800|nmo...@0|b|3.5|3|p...@3||7.5|3
Awire|n...@3|||900|nmo...@0|d|3.5|0|p...@4||3.5|-1
Ed||D5G2;|p...@4||U
Eg||D5G2;|p...@2||U
Es||D5G2;|p...@1||U
Ew||D5G2;|p...@3||U
X
# Cell R_divider;1{lay}
CR_divider;1{lay}||mocmos|1262482864515|1262540954968||DRC_last_good_drc_area_date()G1262541102782|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1262541102782
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-Pin|p...@1||-98.25|-61.5||||
NMetal-1-Pin|p...@2||-98.25|41||||
Ngeneric:Invisible-Pin|p...@3||2.5|-57|||||SIM_spice_card(D5G10;)S[vin vin 0 DC
1,.tran 0 1]
NN-Well-Resistor|resnw...@0||0|0.5|146.5|3|||SCHEM_resistance(D5G10;)S10k
NN-Well-Resistor|resnw...@1||0|-34.5|146.5|3|||SCHEM_resistance(D5G10;)S10k
AMetal-1|gnd|D5G10;|1|S900|resnw...@1|left|-98.25|-34.5|p...@1||-98.25|-61.5
AMetal-1|vin|D5G10;|1|S2700|resnw...@0|left|-98.25|0.5|p...@2||-98.25|41
AMetal-1|vout|D5G10;|1|S2700|resnw...@1|right|98.25|-34.5|resnw...@0|right|98.25|0.5
X
# Cell R_divider;1{sch}
CR_divider;1{sch}||schematic|1262476865031|1262493186468|
Ngeneric:Facet-Center|a...@0||0|0||||AV
NWire_Pin|p...@0||3|3||||
NWire_Pin|p...@1||-5|3||||
NWire_Pin|p...@2||3|-4.5||||
Ngeneric:Invisible-Pin|p...@3||-3|0|||||SIM_spice_card(D5G1;)S[vin vin 0 DC
1,.tran 0 1]
NResistor|resnw...@0||-0.5|3||||3|ATTR_length(D5G0.25;X-1.5;)D187.5|ATTR_width(D5G0.5;X1.5;)D15.0|SCHEM_resistance(D5G1;)S10k
NResistor|resnw...@1||3|0|||R|3|ATTR_length(D5G0.25;X-1.5;)D187.5|ATTR_width(D5G0.5;X1.5;)D15.0|SCHEM_resistance(D5G1;)S10k
Awire|gnd|D5G1;||900|resnw...@1|a|3|-2|p...@2||3|-4.5
Awire|n...@1|||900|p...@0||3|3|resnw...@1|b|3|2
Awire|vin|D5G1;X-0.5;Y0.5;||0|resnw...@0|a|-2.5|3|p...@1||-5|3
Awire|vout|D5G1;X0.5;Y0.5;||1800|resnw...@0|b|1.5|3|p...@0||3|3
X
# Cell inv_40_20;1{ic}
Cinv_40_20;1{ic}||artwork|1266293819284|1266294927508|E
Ngeneric:Facet-Center|a...@0||0|0||||AV
NTriangle|a...@1||0|2|6|6|RRR|
NCircle|a...@2||3|2|1|1||
Nschematic:Bus_Pin|p...@0||-5|2||||
Nschematic:Wire_Pin|p...@1||-3|2||||
Nschematic:Bus_Pin|p...@2||5|2|||RR|
Nschematic:Wire_Pin|p...@3||3|2|||RR|
Aschematic:wire|n...@0|||0|p...@1||-3|2|p...@0||-5|2
Aschematic:wire|n...@1|||1800|p...@3||3|2|p...@2||5|2
Ein||D5G2;|p...@0||U
Eout||D5G2;|p...@2||U
X
# Cell inv_40_20;1{lay}
Cinv_40_20;1{lay}||mocmos|1266296212946|1266415395267||DRC_last_good_drc_area_date()G1266378313585|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1266378313585
Ngeneric:Facet-Center|a...@0||0|0||||AV
NMetal-1-P-Active-Con|cont...@1||3|-5|35|||
NMetal-1-N-Active-Con|cont...@2||5|-63|15|||
NMetal-1-N-Active-Con|cont...@3||5|-75|15|||
NMetal-1-P-Active-Con|cont...@4||3|-17|35|||
NMetal-1-Polysilicon-1-Con|cont...@5||-25|-11||||
NMetal-1-Polysilicon-1-Con|cont...@6||-13|-69||||
NMetal-1-Pin|d|D5G5;|40|-63||||
NMetal-1-Pin|drain|D5G5;|50|-17||||
NMetal-1-Pin|g|D5G5;|-32|-69||||
NMetal-1-Pin|gate|D5G5;|-39|-11||||
NN-Transistor|n...@1||5|-69|17||||SIM_spice_model(D5G3;)SNMOS
Ngeneric:Invisible-Pin|p...@5||-32|-20|||||ART_message(D5G4;)SpMos
Ngeneric:Invisible-Pin|p...@8||-23|-62|||||ART_message(D5G4;)SnMos
NPolysilicon-1-Pin|p...@11||-19|-11||||
NMetal-1-Pin|p...@12||5|-97||||
Ngeneric:Invisible-Pin|p...@16||-83|-26|||||SIM_spice_card(D5G5;)S[Vsource
source 0 DC 0,Vwell well 0 DC 0,Vgate gate 0 DC 0,Vdrain drain 0 DC 0,.dc
Vdrain 0 -5 -1m Vgate 0 -5 -1]
NP-Transistor|p...@0||3|-11|37||||SIM_spice_model(D5G3;)SPMOS
NMetal-1-Pin|s|D5G5;|40|-75||||
NMetal-1-Pin|source|D5G5;|48|-5||||
NMetal-1-P-Well-Con|sub...@0||5|-87|15|||
NMetal-1-Pin|w|D5G5;|1|25||||
NMetal-1-N-Well-Con|w...@0||1|6|35|1||
AP-Active|n...@2|||S900|p...@0|diff-bottom|2|-14.75|cont...@4||2|-17.5
AP-Active|n...@3|||S2700|p...@0|diff-top|3|-7.25|cont...@1||3|-5
APolysilicon-1|n...@4|||S900|p...@0|poly-left|-19|-11|p...@11||-19|-11
APolysilicon-1|n...@5|||S1800|cont...@5||-25|-11|p...@11||-19|-11
AN-Active|n...@6|||S2700|n...@1|diff-top|5|-65.25|cont...@2||5|-63
AN-Active|n...@7|||S900|n...@1|diff-bottom|4|-72.75|cont...@3||4|-75
APolysilicon-1|n...@8|||S0|n...@1|poly-left|-7|-69|cont...@6||-13|-69
AMetal-1|n...@9|||S900|sub...@0||5|-87|p...@12||5|-97
AMetal-1|n...@10|||S0|cont...@6||-13|-69|g||-32|-69
AMetal-1|n...@11|||S1800|cont...@2||5|-63|d||40|-63
AMetal-1|n...@12|||S1800|cont...@3||5|-75|s||40|-75
APolysilicon-1|n...@13|||S0|cont...@5||-25|-11|cont...@5||-25|-11
AMetal-1|n...@14|||S2700|w...@0||1|6|w||1|25
AMetal-1|n...@15|||S1800|cont...@1||3|-5|source||48|-5
AMetal-1|n...@16|||S1800|cont...@4||3|-17|drain||50|-17
AMetal-1|n...@17|||S0|cont...@5||-25|-11|gate||-39|-11
Egnd||D5G5;|p...@12||U
X
# Cell inv_40_20;1{sch}
Cinv_40_20;1{sch}||schematic|1266291699805|1266378624059|
Iinv_40_20;1{ic}|20_2n...@0||25|24|||D5G4;
Ngeneric:Facet-Center|a...@1||0|0||||AV
NOff-Page|c...@0||-17|7||||
NOff-Page|c...@1||19|7||||
NGround|g...@0||9|-0.25|-1|-1.5||
NGround|g...@1||3|-5||||
N4-Port-Transistor|nmo...@2||1|2.5|||R||ATTR_length(D5G0.5;RRRX0.25;Y-2;)D2.0|ATTR_width(D5G1;RRRX1;Y-2;)S20|SIM_spice_model(D5G1;RRRX-0.5;Y-3.5;)SNMOS
Ngeneric:Invisible-Pin|p...@5||-11|1|||||SIM_spice_card(D5G1;)S[vs s 0 DC 0,vw
w 0 DC 0,vg g 0 DC 0,vd d 0 DC 0,.dc vd 0 5 1m vg 0 5 1,".include
C:\\Electric\\C5_models.txt"]
NWire_Pin|p...@6||9|1.5||||
NWire_Pin|p...@9||3|7||||
Ngeneric:Invisible-Pin|p...@10||-9.5|17.5|||||SIM_spice_card(D5G1;)S[vs s 0 DC
0,vw w 0 DC 0,vg g 0 DC 0,vd d 0 DC 0,.dc vd 0 -5 -1m vg 0 -5 -1,".include
C:\\Electric\\C5_models.txt"]
NWire_Pin|p...@11||3.5|16||||
NWire_Pin|p...@13||7.5|13||||
NWire_Pin|p...@15||-4|12||||
NWire_Pin|p...@16||-4|2.5||||
NWire_Pin|p...@17||-4|7||||
NWire_Pin|p...@19||3.5|7||||
NWire_Pin|p...@21||4|16||||
N4-Port-Transistor|pmo...@0||1.5|12|||YR|2|ATTR_length(D5G0.5;RRRX0.25;Y-2;)D2.0|ATTR_width(D5G1;RRRX1;Y-2;)S40|SIM_spice_model(D5G1;RRRX-0.5;Y-3.5;)SPMOS
NPower|p...@0||4|20||||
Awire|d|D5G1;||2700|nmo...@2|d|3|4.5|p...@9||3|7
Awire|d|D5G1;||900|pmo...@0|d|3.5|10|p...@19||3.5|7
Awire|g|D5G1;||0|nmo...@2|g|0|2.5|p...@16||-4|2.5
Awire|g|D5G1;||0|pmo...@0|g|0.5|12|p...@15||-4|12
Awire|in|D5G1;||0|p...@17||-4|7|c...@0|y|-15|7
Awire|n...@4|||1800|nmo...@2|b|3|1.5|p...@6||9|1.5
Awire|n...@5|||900|p...@6||9|1.5|g...@0||9|1
Awire|n...@13|||2700|p...@16||-4|2.5|p...@17||-4|7
Awire|n...@14|||2700|p...@17||-4|7|p...@15||-4|12
Awire|n...@16|||1800|p...@9||3|7|p...@19||3.5|7
Awire|n...@23|||1800|p...@11||3.5|16|p...@21||4|16
Awire|n...@24|||900|p...@0||4|20|p...@21||4|16
Awire|out|D5G1;||0|c...@1|a|17|7|p...@19||3.5|7
Awire|s|D5G1;||2700|pmo...@0|s|3.5|14|p...@11||3.5|16
Awire|s|D5G1;||2700|g...@1||3|-3|nmo...@2|s|3|0.5
Awire|w|D5G1;||1800|pmo...@0|b|3.5|13|p...@13||7.5|13
Ein||D5G2;|c...@0|y|U
Eout||D5G2;|c...@1|a|U
X
# Cell inv_sim;1{sch}
Cinv_sim;1{sch}||schematic|1266295151883|1266296078869|
Iinv_40_20;1{ic}|20_2n...@0||1|-2|||D5G4;
Ngeneric:Facet-Center|a...@0||0|0||||AV
NWire_Pin|p...@0||-6|0||||
NWire_Pin|p...@1||11|0||||
Ngeneric:Invisible-Pin|p...@2||2|-4|||||SIM_spice_card(D5G0.5;)S[Vdd vdd 0 DC
5,Vin in 0 DC 0,.dc Vin 0 5 1m,".include C:\\Electric\\C5_models.txt"]
Awire|in|D5G1;||0|20_2n...@0|in|-4|0|p...@0||-6|0
Awire|out|D5G1;||1800|20_2n...@0|out|6|0|p...@1||11|0
X
