Deepak
Deepak Sekar wrote, on 8/19/12 6:54 AM:
I changed my technology to have just one layer (a metal layer). Still
having issues with DRC. Am getting the same bug. I spent some time
checking out if DRC works for other technologies (eg) the built-in
nMOS technology. Am having trouble with that.
The issue should be fixed in the next release. For now add a spacing
rule to your deck like
<LayersRule ruleName="7.2 Mercury Spacing Rule" layerNames="{Metal,
Metal}" type="UCONSPA" when="ALL" value="2"/>
Have copied below notes from previous users in the group showing the
same issue...
https://groups.google.com/d/msg/electricvlsi/1Cj3Oa9DnbM/ALLNOVRzQoYJ
That is a different issue and quite old (2007) actually.
Gilda
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