Jake, Thanks for the information. I am using SCMOS rules with magic layout. Some rules are not checked in magic, e.g. the distance between n-wells with different potentials, the distance between wide metals and others, ... That's why I asked if the Electric VLSI checks all the rules. I appreciate your inputs and Steven and others' comments on this issue in advance. Yonggang
On Wednesday, July 17, 2013 9:49:38 AM UTC-4, rjacobbaker wrote: > Yonggang, > > The SCMOS rules from MOSIS can be found at > http://www.mosis.com/files/scmos/scmos.pdf > > Also, see the tutorials here: > http://cmosedu.com/videos/electric/electric_videos.htm for some basic > capabilities. > > Good luck, Jake. > > > On Wed, Jul 17, 2013 at 6:46 AM, <[email protected] <javascript:>>wrote: > >> Steven, >> >> Thanks again for the reply. Could you elaborate more about the DRC >> capabilities of Electric VLSI? Let's say, for 0.25um CMOS in general, what >> rules are checked, and more importantly what are not checked? How about >> 0.18um and 0.13um? We are always dealing with analog mixed-signal ASICs, >> so no technology smaller than 0.13um is needed. >> >> Thanks. >> Yonggang >> >> -- >> You received this message because you are subscribed to the Google Groups >> "Electric VLSI Editor" group. >> To unsubscribe from this group and stop receiving emails from it, send an >> email to [email protected] <javascript:>. >> For more options, visit https://groups.google.com/groups/opt_out. >> >> >> > > > > -- > http://cmosedu.com/jbaker/jbaker.htm > > -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/groups/opt_out.
