What is the W/L you are using for both your nmos and pmos?
On Wed, May 7, 2014 at 7:24 AM, Puneeth R <[email protected]> wrote: > > I am developing a standard cell library using electric. The image here > shows the 1x inverter i have designed.Please help me how to > size > transistors to increase its drive strengths to 2x,3x,4x and so on. > > > <https://lh5.googleusercontent.com/-a6DcekNbl9o/U2pBU5QPDOI/AAAAAAAAADo/FtJZnCJ9RyI/s1600/inverter.jpg> > > -- > You received this message because you are subscribed to the Google Groups > "Electric VLSI Editor" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > For more options, visit https://groups.google.com/d/optout. > -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
