Electric has placement and routing tools as well as a rudimentary
"Silicon Compiler". You can read both VHDL and Verilog but they must be
structural, not behavioral (which limits things). Then the automated
tools can be run. It's not production-quality, but it works.
-Steven Rubin
On 1/23/2022 12:03 AM, '2020 11049' via Electric VLSI Editor wrote:
Hello,
Can we generate automatic layout by any means in Electric VLSI. Like
by using Verilog code to generate layout or any similar thing possible
in Electric VLSI.
--
You received this message because you are subscribed to the Google
Groups "Electric VLSI Editor" group.
To unsubscribe from this group and stop receiving emails from it, send
an email to electricvlsi+unsubscr...@googlegroups.com
<mailto:electricvlsi+unsubscr...@googlegroups.com>.
To view this discussion on the web visit
https://groups.google.com/d/msgid/electricvlsi/9dd43207-dd55-426e-bef7-32a8989d9f8fn%40googlegroups.com
<https://groups.google.com/d/msgid/electricvlsi/9dd43207-dd55-426e-bef7-32a8989d9f8fn%40googlegroups.com?utm_medium=email&utm_source=footer>.
--
You received this message because you are subscribed to the Google Groups "Electric
VLSI Editor" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to electricvlsi+unsubscr...@googlegroups.com.
To view this discussion on the web visit
https://groups.google.com/d/msgid/electricvlsi/0810d631-2420-0053-9084-56a95f2bd160%40staticfreesoft.com.
