Hi ElectricVLSI!

I got some info of the Behavioral Representation from an old VLSI book
written by NIEL H.E. Weste/Kamran Eshragran that BR representation
describes how a particular design should respond to a given set of inputs.
Behavior may be specified by Boolean equations, tables of input and output
values, or algorithms written in standard high level computer languages or
special Hardware Description Languages (HDLs). The Latter include VHDL,
Verilog and ELLA.
When Electric was Developed did the Engineers documented the Implementation
of the Silicon Compiler in Java? If we need to upgrade the electric tool to
convert BD to SD we might need algorithms of all digital circuits like for
example adder, multiplier, etc... I guess it will be in Java.

Just my opinion.

BR, Joselito





On Wed, Jan 26, 2022 at 1:08 PM Steven Rubin <stru...@staticfreesoft.com>
wrote:

> To be able to handle behavioral Verilog, the compiler (in Electric) needs
> to be upgraded so it can do the conversion from behavior to structure.
>
>    -Steven Rubin
> On 1/25/2022 8:36 PM, Ashwin Balagopal S ee17d200 wrote:
>
> Oh that's interesting. I tried it out and it worked pretty well.
>
> What needs to happen to be able to get it to synthesise behavioural
> netlists?
>
> Ashwin
>
> On Sun, 23 Jan, 2022, 9:56 pm Steven Rubin, <stru...@staticfreesoft.com>
> wrote:
>
>> Electric has placement and routing tools as well as a rudimentary
>> "Silicon Compiler". You can read both VHDL and Verilog but they must be
>> structural, not behavioral (which limits things). Then the automated tools
>> can be run. It's not production-quality, but it works.
>>
>>    -Steven Rubin
>> On 1/23/2022 12:03 AM, '2020 11049' via Electric VLSI Editor wrote:
>>
>> Hello,
>>
>> Can we generate automatic layout by any means in Electric VLSI. Like by
>> using Verilog code to generate layout or any similar thing possible in
>> Electric VLSI.
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