Jerry -

Thanks for providing your open comments.  My comments here are not
particular to any simulation tool.  What caught my attention was your
mention of a comparative analysis of the software application to "human
design rules".  

The majority of the boards we typically evaluate are component-dense,
multilayer, typically 10" X 12" in size, deployed in shielded enclosures for
large systems, with various I/O.  Based on my own personal experiences and
conversation with other EMC engineers, for my customer base my preference is
just the opposite (opt for rules-based approach over simulations).  I am not
aware of any package that can truly assess a board in a system (after all,
that's where the compliance is ultimately stated), considering all the
different mechanisms possible, and found that I ended up spending a great
deal of  time chasing down IBIS and other models (the accuracy of which is
also questionable), just to run the simulation.  The typical component data
sheet lists maximum and typical rise times, but not minimum.  To counter
this, some engineers have taken the approach of worst-case model assumption,
which sometimes leads to questionable simulation results.  My opinion is
that the process of heaping worst-case assumptions upon one another often
leads to a destination of EMC overdesign.

Some time ago I saw an interesting commentary by Dr. Howard Johnson on EMC
simulation, and tend to agree that it is extremely difficult for any one
tool to be both all encompassing and valid.  I believe EMC simulation tools
are excellent for gaining insight into the various mechanisms, and coupled
with a variety of practical experiences, leads to an efficient deployment of
design rules on an individual design basis.  

But I always keep my eyes open to all the latest developments, and ears
available to all knowledgeable opinions!

Regards,

Mark Gill, P.E.
EMC/Safety/NEBS Design
Nortel Networks - RTP, NC, USA


> -----Original Message-----
> From: Meyerhoff Jerry-G10812 [SMTP:[email protected]]
> Sent: Thursday, May 25, 2000 6:12 PM
> To:   'Dale Albright'; [email protected]
> Subject:      RE: Quiet Expert
> 
> 
> Dale & Group :
> 
> We're just now evaluating Quiet Expert for single PCB automotive embedded
> (microprocessor )controller designs. Got training & will run some typical
> designs through it to see if it catches EMC design weaknesses
> easier/faster/more surely than 
> by human design rule checking , thus eliminating wasted design revisions /
> turns / spins. 
>  
> What is your application & what benefits are you looking for ? 
> 
> Anyone else out there using it? 
> 
> Is there a user's group ?
> 
> Best regards,
> Jerry Meyerhoff
> Principal Staff Engineer
> Motorola AIEG [Automotive & Industrial Electronics Group] of
> IESS [ Integrated Electronic Systems Sector ]
> 4000 Commercial Ave
> Northbrook Il. 60062
> 847/480-5686 voice
> 847/205-2452 fax
> [email protected]
> 5/25/2000
> 
> -----Original Message-----
> From: Dale Albright [mailto:[email protected]]
> Sent: Wednesday, May 24, 2000 4:38 PM
> To: [email protected]
> Subject: Quiet Expert
> 
> Group,
> 
> I am in the process of evaluating an EMI analysis tool.  The program is
> "Quiet Expert" by Innoveda (formally Viewlogic as I understand it).  Is
> anyone using this program or have you evaluated it along with others?
> 
> Dale
> 
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