In a message dated 5/23/00, David Gelfand writes: > We have an emissions problem on a board and I would like to suggest a ground > plane in the area of an RJ-45 jack (TNV-1). But we have always asked our PCB > designers to leave TNV traces free of ground and power planes to avoid > arcing during surge and dialectric strength tests. > > Does anyone know where to find specs on breakdown voltages between PCB layers? > Has anyone successfully used ground planes above or below TNV traces? We > are testing to UL1950 and Part 68.
David: I do not think it is a good idea to put ground plane under your TNV-1 circuits. It is possible to do this, but I do not recommend it. You do not mention the type of EMC problem you are trying to resolve, but if it is an emissions problem, the first choice would be to add a common mode choke in series with tip/ring. If that alone is not sufficient, you can sometimes add small value caps (100 pF or so) from tip to chassis and from ring to chassis. Since these capacitors bridge the isolation barrier, they must be suitable high voltage caps. Capacitors in these locations can be very helpful if you have a "quiet" metal chassis to connect them to, but they are useless and even potentially harmful for EMC if the product has only a plastic housing with no real chassis. When adding capacitors, you must also watch out for detrimental effects on the intended signal. If you are still intent on adding a ground plane under your TNV-1 circuit, the main requirement for both FCC Part 68 and UL 1950 will be to pass a 1000 VRMS hipot test. You can do this by carefully specifying the required insulation between the relevant layers, but now your board stack-up will be subject to special requirements that both you and your board vendor must keep track of. Another potential problem is that TNV vias which pass through the ground plane must have a large enough clearance hole in the ground plane to avoid hipot failures at that point. There is one special case where the requirements of the above paragraph are easy to meet. This would be when the TNV circuits are on the top layer and the ground plane is on the bottom layer, with no copper on any of the internal layers. In this case, the entire thickness of the board is insulation, which is more than adequate. However, as soon as you start using the inner layers, you must get involved with specifying the layer-to-layer dielectric strength. While the overall thickness of the board is always specified, individual board fabricators typically exercise considerable freedom in selecting the thickness of the insulation between inner layers. In summary, I do not think it is a good idea to extend your ground plane under the TNV circuits, but it is technically possible to do so by carefully specifying the circuit board stack-up. Before you resort to this solution, I think you should carefully examine the reasons why this seems to be necessary, and consider alternative solutions. Joe Randolph Telecom Design Consultant Randolph Telecom, Inc. http://www.randolph-telecom.com ------------------------------------------- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: [email protected] with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: [email protected] Michael Garretson: [email protected] For policy questions, send mail to: Richard Nute: [email protected]
