Hi David, We have some experience with this at my company, although not involving TNV circuits. My company produces high voltage, high frequency power conversion equipment mainly for the semiconductor manufacturing industry. We are constantly challenging the voltage withstand capabilities of materials, and pcb's are no exception.
We use FR-4 pcb material, and for years we have used a voltage withstand guideline of 1000 V/mil for the base material and 500 V/mil for the pre-preg. As another responder has already noted, you should be able to get numbers for your specific material from your supplier. Once you have these numbers, you get to make some easy calculations. The way we do it is to take the required transient withstand voltage (based on the operating voltage and the installation category) and divide it by the voltage withstand guideline for the material in question. This will give you two numbers: one for base material and one for pre-preg. Since you are dividing V by V/mil, the results will be in mils. Now you know how thick the base and pre-preg layers must be. If you have just a two-layer board, the pre-preg number doesn't matter and you can stop reading here. If you have a multi-layer board, read on. . . . You must account for the copper on inner layers, since this subtracts from your insulating material in the z axis (vertical dimension). The guideline we use is 1.4 mils per ounce of copper. So if you're using 2 oz. copper, your trace will be about 2.8 mils high. This gets subtracted from the thickness of the pcb layer. If you calculated that you needed an 18 mil thick pre-preg layer, and you're using 2 oz. copper, you actually need a 21 mil thick pre-preg layer because of the copper thickness. Something to consider: To what tolerance can your pcb manufacturer hold layer thicknesses, especially pre-preg layers? Obviously this affects voltage withstand capability and should be taken into account when making your calculations. If you have through-hole parts or vias in the area of an inner layer ground plane, of course you need to think about inner layer x,y plane (lateral) creepage requirements. Generally speaking, inner layer creepage distances must be the same as outer layers -- but, there is a way around this that allows for reduced inner layer spacings. The trick is to classify the inner layer x,y plane dimensions as "through-thickness insulation", owing to epoxy bonding. Then you can reduce the dimension to 0.4 mm in accordance with UL 1950. You may choose not to reduce to this level; we don't. We use 1 mm minimum. The gotcha is that your agency might insist that your pcb manufacturer be certified to UL 796 in order to allow this. (Ours did.) We have used these methods for several years now with great success and acceptance from various agencies. Jeff Jenkins Regulatory Compliance Advanced Energy Industries, Inc. Fort Collins, CO USA -----Original Message----- From: David Gelfand [mailto:[email protected]] Sent: Tuesday, May 23, 2000 9:33 AM To: 'EMC-PSTC Internet Forum' Subject: Breakdown voltage between pcb layers Hello group, We have an emissions problem on a board and I would like to suggest a ground plane in the area of an RJ-45 jack (TNV-1). But we have always asked our PCB designers to leave TNV traces free of ground and power planes to avoid arcing during surge and dialectric strength tests. Does anyone know where to find specs on breakdown voltages between PCB layers? Has anyone successfully used ground planes above or below TNV traces? We are testing to UL1950 and Part 68. Any input would be much appreciated. Thank you, David. David Gelfand Regulatory Approvals Group Leader Memotec Communications Inc. Montreal Canada ------------------------------------------- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: [email protected] with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: [email protected] Michael Garretson: [email protected] For policy questions, send mail to: Richard Nute: [email protected] ------------------------------------------- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: [email protected] with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: [email protected] Michael Garretson: [email protected] For policy questions, send mail to: Richard Nute: [email protected]
