Hi all,
I feel the best way to close the argument about the "split"
is to invoke a lot of discussion on EM related topics!
Fortunately, I have a lot of doubts to clarify!
***********************************
In CML/pCML/ECL/pECL logic families, we see a differential
output with even mode operation. I mean, CML/pCML sink currents
on both the lines(T/F) whereas ECL/pECL source current on both
lines(T/F). (Even Mode).
Comparing this with LVDS, the current is sourced out of one line
and is returned on the other one. (Odd mode).
I can understand the benefits of differential pair in the odd mode
operation (Flux Cancellation).
Question is:
Does the same phenomenon occur in the even mode also?
Please give me some clue, any further references to look.
Thanks in advance,
best regards,
- Priyawrat.
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