>
>____________________Reply Separator____________________
>Subject: Re: Fwd:Isolations on inner layers
>Author: [email protected] (Peter Merguerian)
>Date: 3/17/00 5:33 PM
>
>Dear Jim,
>
>For North America, for distances in the same layer all you have to do is
>use a UL Recognized multilayer board and have min. 0.4 mm between the
>traces and pass the Dielectric Strength Test requirements between the
>various insulations involved.
>
>However, some european and other international test houses might not accept
>this approach since they may state that they do not accept US Component
>Standards (ie a Recognized UL board tested to UL796) but would rather
>subject the board to the Thermal Cycling Test, Humidity Conditioning and
>Electric Strength Tests as specified in 2.9.7 of the IEC 950 standard.
>
>Has anyone come across a European or other international test house which
>insists on the long term aging tests in 2.9.7?
>
>
>
>At 07:50 17/03/2000 -0500, you wrote:
>>
>>forwarding for [email protected] ... Jim
>>
>>____________________Forward Header_____________________
>>Subject: Isolations on inner layers
>>Author: Mihai Vintila <[email protected]>
>>Date: 3/16/00 7:34 PM
>>
>> Hello,
>>
>> I have a question concerning isolations for hazardous voltages on
>inner
>>layers of a multilayer PCB.
>> The material is standard FR4.
>> I have read the EN60950 spec and it seems like for copper on
>different
>>inner layers an isolation of 0.4mm would be good enough. Now what I could
not
>>figure is about traces on the same inner layer. In this case an isolation
>of 0.4
>>mm is as good as it is between different layers, or should I take into
>>consideration the manufacturing errors (impurities, air bubbles, a.s.o.) and
>>make a bigger isolation, but how much bigger?
>> The voltages I am working with are some of them TNV1 and others
>220VAC
>>(mains).
>>
>>Many thanks,
>>
>>Mihai
>>
>>
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