Hi all,
I'm now considering the problems regarding to EMC checks on high speed PCB
designs. Particularly, the power and ground of various voltages and
characteristics confused me a lot. As a common guideline, it is necessary to
check for power/ground planes or shapes overlapping between adjacent layers in
a PCB board?
It is common now in multi-layer board to have following stackup:
----- top
___ gnd
___ pwr1
-- -- sig
-- -- sig
____ pwr2
____ gnd
-- -- sig
-- -- sig
____ pwr
____ gnd
-------- bottom
Shape overlap between pwr1 and pwr2 is allowable. It might be over-kill to
check and warn for this case.
But there are sure to have EMC problems when different power/ground planes to
be adjacent as follows:
--------top
____ gnd
____pwr1
____pwr2
-- -- sig1
-- -- sig2
____gnd
-- -- sig3
-- -- sig4
___ pwr2
___ pwr1
___gnd
------ bottom
Is it the case?
Thanks in advance!
Feng Li
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