http://www.ieee-pses.org/symposium
          http://www.emc2004.org/


I stand corrected. When I said 61000-4-2 can be used for testing IC's I
considered only the waveform applied. As pointed out by Doug this
standard does not define failure for IC's.

And speaking of the waveform, I don't think much of it. I measured many
human ESD discharges with a metal tool in the hand and the current rise
time was much faster than the standards call for. As some ESD protection
circuits are triggered by dv/dt, the slower rise time can adversely
affect the measurement.

Anyone else out there working with TLP's for ESD testing?

   Dave Cuthbert
   Micron Technology


From: [email protected]
[mailto:[email protected]] On Behalf Of drcuthbert
Sent: Thursday, June 03, 2004 10:54 AM
To: [email protected]; [email protected]
Subject: RE: misapplication of system level standards


http://www.ieee-pses.org/symposium
          http://www.emc2004.org/


Individual integrated circuits are normally sample tested for Human Body
Model, Machine Model, and charge coupled device models. In any pin and
out any other pin. So 61000-4-2 can certainly be used to test an IC. 4
kV is a common design goal for HBM.

   Dave Cuthbert
   Micron Technology


From: [email protected]
[mailto:[email protected]] On Behalf Of Doug Smith
Sent: Wednesday, June 02, 2004 11:22 PM
To: emc-pstc
Subject: misapplication of system level standards


http://www.ieee-pses.org/symposium
          http://www.emc2004.org/


Hi Everyone,

In my travels I have visited many clients who are asked by their
customers to apply inappropriate tests to system components (with no
technical justification). This has inspired me to write an article
about it.

This month's Technical Tidbit (link is the picture of a chip and ESD
simulator at the bottom of the page at http://emcesd.com ) deals with
system level test standards being applied to internal devices or
modules. If you design or test IC chips or modules that are included
in a larger system design, this is a must read article for you.

Abstract: A trend in component testing has been developing in recent
years. Vendors of system components are being required by their
customers, equipment manufacturers, to apply inappropriate system
level tests to system components such as chips or modules. One such
case of misapplication of a system test to IC chips is explored and
implications discussed.

Doug

--

     ___          _       Doug Smith
      \          / )      P.O. Box 1457
       =========          Los Gatos, CA 95031-1457
    _ / \     / \ _       TEL/FAX: 408-356-4186/358-3799
  /  /\  \ ] /  /\  \     Mobile:  408-858-4528
|  q-----( )  |  o  |    Email:   [email protected]
  \ _ /    ]    \ _ /     Website: http://www.dsmith.org




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