Ravinder,
This is a challenging measurement. The di/dt of the ESD pulse is in the
neighborhood of 15 A/ns. Figuring roughly 0.5 nH/cm for bonding the PCB
to a measurement plane and you have 8 volts of ESD signal per cm of
bonding wire. This will drive any active probe I know of to distraction.
If you can connect to the measurement node/common with 50 ohm coax you
have a chance. Some ferrite beads at the PCB end will help. A floating
battery operated oscilloscope might help, especially if it is enclosed
in a faraday cage. To see how things are doing you can connect the
coaxial hot and shield to the PCB common and see what signal the ESD
pulse induces into the measurement equipment. If this is smaller than
the logic signal you are looking for then it might work. But I would try
to avoid this approach and go for an indirect measurement.
This is one of those troubleshooting exercises that are great if you can
solve it without an oscilloscope measurement - if you can deduce what is
happening by how the circuit behaves in response to the ESD event.
This fast di/dt event can induce signals into the digital lines that
will trigger things. Some lines you can decouple with capacitors. These
would be reset lines, power rails, and any other line that will work
with a slow signal.
There are tricky ways around these ESD issues such as having the circuit
sense that there is a problem and having it reset or reboot or something
along those lines. Another solution I have seen is to have the circuit
blindly resend the data every few microseconds so that if there is a
disruption due to an ESD event no one notices.
Dave Cuthbert
Micron Technology, Inc.
From: [email protected] [mailto:[email protected]] On Behalf Of
[email protected]
Sent: Monday, February 27, 2006 5:48 PM
To: [email protected]; [email protected]
Subject: RE: Measurement of logic signal during ESD test
A great place to start is at Doug Smith's High Frequency Measurements
Web
Page: http://emcesd.com. Doug is also a member of this list.
Regards,
Stu Benner
EMConsulting
www.emcwizard.com
From: [email protected] [mailto:[email protected]] On Behalf Of
[email protected]
Sent: Monday, February 27, 2006 5:03 PM
To: [email protected]
Subject: Measurement of logic signal during ESD test
Hi EMI Gurus,
I need to troubleshoot a logic failure which occurs when 16 kV ESD
pulses
are applied to the PCB. Is there a reliable way to attach the
oscilloscope
probe to the failing device while ESD gun is being fired elsewhere on
the
PCB. Will it help if I use a differential probe.
Thanks for the help.
Regards,
Ravinder Ajmani
Server PCB Development
Hitachi Global Storage Technologies
-
This message is from the IEEE Product Safety Engineering Society
emc-pstc discussion list. Website: http://www.ieee-pses.org/
To post a message to the list, send your e-mail to [email protected]
Instructions: http://listserv.ieee.org/request/user-guide.html
List rules: http://www.ieee-pses.org/listrules.html
For help, send mail to the list administrators:
Scott Douglas [email protected]
Mike Cantwell [email protected]
For policy questions, send mail to:
Jim Bacher: [email protected]
David Heald: [email protected]
All emc-pstc postings are archived and searchable on the web at:
http://www.ieeecommunities.org/emc-pstc
-
This message is from the IEEE Product Safety Engineering Society
emc-pstc discussion list. Website: http://www.ieee-pses.org/
To post a message to the list, send your e-mail to [email protected]
Instructions: http://listserv.ieee.org/request/user-guide.html
List rules: http://www.ieee-pses.org/listrules.html
For help, send mail to the list administrators:
Scott Douglas [email protected]
Mike Cantwell [email protected]
For policy questions, send mail to:
Jim Bacher: [email protected]
David Heald: [email protected]
All emc-pstc postings are archived and searchable on the web at:
http://www.ieeecommunities.org/emc-pstc
