Let us see - that is at least 500VA at test levels for most of my stuff - so you will probably have other problems long before that... And was said, the current limit is not normative.
As a feared and despised employee (Darth Vader theme music here) of a company division that makes power conversion equipment, need to say some more about this stuff. (And some of my employer's customers have some very interesting stories on this subject). The only difference in the di-electric withstand (aka 'hi-pot') for equipment is the test level and where the potential is applied. Breakdown due to tracking and corona discharge seem to be the most common root cause for failures during Type Tests for power supplies (one hi-pot failure from tracking after a FET puked its guts all over the power supply), transformers, reactor coils, etc. Breakdown due to insulator material damage during construction is prevalent root cause for component power supplies. Breakdown due to incorrect encapsulation process is/was (seems to not occur these days) prevalent root cause for some small linear transformers. Breakdown due to welding at incorrect setting is prevalent root cause (actually only happened once) for large transformers (100s or 1000s of kVAs). The factories seldom find construction errors via hi-pot. If there is a problem with construction or materials, it is typically found by the insulation or impulse tests. But have found a few design or material problems using hi-pot during Type Tests - typically the transformers in a SMPS after the output or winding O/L tests. And you should control the dv/dt of AC test voltage - mostly done to minimize field-shape induced corona discharge for test levels > 5kV (test some to much higher, very fun to play with). dv/dt control of DC test voltage will minimized inrush to caps; and after at required test level, the upper trip limit should be set very low - typically < 1mA. Use the hi-pot for more than meeting agency's factory surveillance requirements - use as reliability and quality data. Send this data to a server and periodically look at this for the obvious reasons. If your factory test equipment cannot control voltage ramp rates, current hi/lo trip levels, and does not talk to a database, you are just not doing it right. Back from OT - what is behind this CSDS proposal? What have committee members seen to influence these requirements? Brian -----Original Message----- From: Tyra, John [mailto:john_t...@bose.com] Sent: Tuesday, June 24, 2014 10:30 AM To: Brian Oconnell; EMC-PSTC@LISTSERV.IEEE.ORG Subject: RE: UL61010-1 CSDS Proposal for 6.5.2.4 For IEC60065 Appendix N2.1 (informative) specifies a maximum production line dielectric trip current limit of 100mA. This is considered a dielectric failure and looked at as the same as breakdown or flashover. -----Original Message----- From: Brian Oconnell [mailto:oconne...@tamuracorp.com] Sent: Tuesday, June 24, 2014 12:45 PM To: EMC-PSTC@LISTSERV.IEEE.ORG Subject: Re: [PSES] UL61010-1 CSDS Proposal for 6.5.2.4 No. Nicht. Aon. It does NOT matter that current flows through the 'filters' and other stuff during AC hi-pot and 'trips' the instrument. This is a good thing - set limit levels on your test equipment to verify cap values and leakage paths. There is no inherent current limit for this test in the affected standards for di-electric withstand. You do control the ramp and current levels in your factory hi-pot? No? Sit in the corner. Brian -----Original Message----- From: Brian Oconnell Sent: Monday, June 23, 2014 5:30 PM To: EMC-PSTC@LISTSERV.IEEE.ORG Subject: UL61010-1 CSDS Proposal for 6.5.2.4 This is excerpted from the latest UL61010-1 CSDS Proposal for 6.5.2.4 Impedance of PROTECTIVE BONDING of plug-connected equipment: "It was proposed that all hi-pot tests should be permitted to be performed with either ac or dc, particularly because OEM power supplies often fail when tested with ac, but pass when tested with dc. This seems to be because IEC 60601-1 3rd edition, IEC 60950, and IEC 62368-1, to which most of these power supplies are tested, permit either ac or dc testing. The consensus of ISA 82 is that this change is appropriate. It is also recommended that this change be reflected in the US comments on Part 1 by the USTAG." Ok, why are component power supplies failing AC, but passing the equivalent DC withstand test levels? If from reactance, just control dv/dt (many standards provide a min rate). And what does the protective bond test have to do with the test conditions for di-electric withstand? Or am I missing something obvious? Brian - ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. 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