John Prentice wrote: > Seb > >>> if none of these are what you want then yes you need to write your own >>> VHDL. >> Yes, that's what I need to do.. >> >> I downloaded the Xilinx developer code. Wow - there's a lot of it, but >> it seems it caters for all of their products. Can anyone help kickstart >> my vhdl tinkering by a quick description of the development process to >> create the .bit files that you load onto the Xilinx chip on the Mesa >> board? >> > > That is a tall order and I am afraid I am only going to give a superficial > idea - I hope it is not insulting. > > You essentially provide two inputs. A source file of the hardware > description language and a set of "constraints". In the simplest form these > constraints are the mapping of HDL signal names onto physical pins of the > chip and defining the electrical characteristics (e.g. LSTTL, pullups etc.) > of the pins. > > The Xilinix ISE automates the workflow when you have this data by double > clicking on any stage in the Process pane.. > > I have uploaded a short movie of this at > > www.castlewoodconsultants.com/Misc/ISEWorkflow.wmv > Nice demonstration.
I must admit that when I downloaded and installed ISE, I found the GUI to be VERY opaque. "Ok, theres a screen, now what do I do?" The manual tells you to push this button, and then that button, but not what the buttons really do. (I guess I'm just not a fan of IDE type systems.) I started reading the manuals, and once I realized the the real work is done by command line programs that are invoked by the GUI, I tossed the GUI and never looked back. I'm using my favorite editor to write the VHDL, and GNU make to run the toolchain. If there is a "foo.vhd", I can type "make foo.bit" and the various tools are invoked in the proper order. A few special comments in the top level VHDL are parsed by the makefile to tell it what constraints file and FPGA device to use. That makefile is in CVS (actually I have a few tweaks that I haven't committed yet, but they will be there soon). The makefile is in src/hal/drivers/mesa5i2x/firmware. In addition to running the Xilinx tools, it can use GHDL and GtkWave (GPL software) to do simulations, which I've found very handy. I'm trying to include simulation testbeds for the VHDL that I write, and they will wind up in CVS as well. I will try to get over some of the infrastructure issues and get some working code in CVS soon (this weekend hopefully). Regards, John Kasunich ------------------------------------------------------------------------- This SF.net email is sponsored by DB2 Express Download DB2 Express C - the FREE version of DB2 express and take control of your XML. No limits. Just data. Click to get it now. http://sourceforge.net/powerbar/db2/ _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
