Jon,

You suggest that the PC would request the registers from the IO board and
the IO board would respond with the requested registers. How much delay,
jitter, latency,... is acceptable?

The processor could send a new command every servo cycle. On receipt of the
command, the IO board could then send the current registers to the PC AND
process the command. The PC would use those registers to compute the next
command.

There will always be a delay between reading the registers and generating a
new command. Is the delay using this scheme too long? Can the software
compensate for the delay? Given the current velocity and the time delay, we
could compute a projected position. Given the velocity, acceleration, and
time delay, we could do even better.

This approach would save one packet. More importantly, the PID calculation
could take more time. In fact, it could use the essentially the entire servo
cycle time. That would let us increase the servo rate.

I think of this as overlapping the operation of the PC and the IO board.
Does it make sense?

Ken

[EMAIL PROTECTED]
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-----Original Message-----
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] Behalf Of Jon Elson
Sent: Saturday, October 27, 2007 7:16 PM
To: Enhanced Machine Controller (EMC)
Subject: Re: [Emc-users] Ethernet I/O


Brian Michalk wrote:
> I've done a bit of programming and circuit board design with Silicon
> Laboratories 8051 chips.  They have an ethernet developers kit complete
> with schematics.
>
http://www.silabs.com/tgwWebApp/public/web_content/products/Microcontrollers
/en/EthernetDK.htm
>
>
> I have not priced the components, but a board should cost less than $20
> each.
The 8051 is not a good choice for real time control of motors at
high precision.  I suspect that an 8051-based interface might
just barely be able to keep up with a 1 KHz servo update rate
(2000 packets/second received, 1000 packets/sec sent back to
PC).  I'm hoping to be able to turn up the servo update rate
quite a bit with this system.  The chip that I've been looking
at has a 10/100 Mbit/sec ethernet MAC on chip, with DMA transfer
to dedicated on-chip RAM.  It is based on the 32-bit ARM7
processor, which is likely to be hundreds of times faster at
handling the ethernet protocol.  Even at 1 KHz servo rate, it
would have to receive a request from the PC, decode it, perform
the requested register reading and then build a packet to send
back to the PC.  The PC would take 50 us or so as do the PID
calculations and then send a velocity command packet to the
device.  It would be good to handle each request in maybe 100 us
or so.  I have great doubts that an 8051 could process the
protocol stack and do the I/O in 25 or so instructions.

Jon

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