On Wed, 2011-09-14 at 09:21 +0100, Schooner wrote: > Hi > > This was a vexed question for me after I made a pendant and need more IO > to work it. > > None of the Parport IO cards I tried would not work at all, the problem > was getting them to work in EPP with pins 2-9 as inputs.
For basic EMC2 I/O, EPP should not be needed or used. Until recently, all cards seemed to just work, no special chip set or EPP mode needed. My understanding is, for SPP output, pins 2-9 just reflect what is in the data register at Base+0, which is latched by simply writing the data to the register, but unlike EPP none of the control pins will take part in the process. If one wants to talk to a device that needs hardware handshaking, it will need to be done in the driver software and usually is fairly slow, but fine for basic EMC2 I/O. In order to read SPP or Bi-Dir input on pins 2-9, the port's input latch needs to be enabled by setting the control register (Base+2) bit 5. This link indicates bit 6 might also be needed: http://www.beyondlogic.org/spp/parallel.htm#6 (see bi-directional section) EMC2's driver, hal_parport, should set this, such as: " loadrt hal_parport cfg="0x278 0x378 in 0x20A0 out" " A few resistors (5k Ohm should be okay with the PC's 5Vdc, reference V=IR), a voltmeter, and reading the control register, can be used to verify SPP and Bidirectional modes. In SPP mode, the pins can be driven high or low by writing to the data register, biasing the pins 2-9 high or low should not change the output voltage (use care to not over current the pins, 1 ma should be a good maximum for testing). 5Vdc | R 5k Ohm | 5k Ohm (should not need, but safer) PP pin--x---R-- Test Point for Meter (2-9) | R 5k Ohm | V Ground I haven't tried the above, but in SPP mode, the pin should have close to 5 or 0 Volts dependent in the data in the data register. In Bi-Dir mode, the pins will go to high-Z state and should always float to 2.5 Volts. So, far only Base+0,1,2 are involved and should be enough for EMC2 I/O that doesn't communicate with an FPGA peripheral and leaves the PP status control pins open for general purpose I/O. Conversely, if the port is in EPP or other mode, the control and status pins will be controlled by the port's firmware and not by reading or writing data to the corresponding registers. Check the ECR (Base + 0x400h) to make sure it is in Standard mode (showport utility). ... snip > I got both computers running with MOSChip based cards (9845 I think). > Once I managed to force them into mode, I did not have to repeat it all > at every start up. > What I did find however, was that 2 of the cards recommended (SIIG and > Sun1188) would not work in input mode no matter what I did. > This despite both functioning as such if used with Mach. I suspect a DCR bit 5 and ECR bit 5, 6, 7 setting problem. > There were also differences in getting the card to work under the same > version of EMC ( seems to make no difference which one you use), almost > identical computers (same make model, just 4Mhz difference in processor > speed). This should not happen if the ports are truly in SPP or Bi-Dir since EMC2 software and not port firmware will control any timing aspect. Some parallel ports run at 3 Volts and can be a problem. For MPG encoder input the parallel port read function should be in a fast thread such as "base", otherwise encoder steps could be lost. " addf parport.1.read base-thread ... addf encoder.update-counters base-thread " > So the moral is, it will be easy once you have done it, keep hitting > your head on it !! > > regards Some of what I stated above has not been verified by me from actual experience. -- Kirk Wallace http://www.wallacecompany.com/machine_shop/ http://www.wallacecompany.com/E45/index.html California, USA ------------------------------------------------------------------------------ BlackBerry® DevCon Americas, Oct. 18-20, San Francisco, CA Learn about the latest advances in developing for the BlackBerry® mobile platform with sessions, labs & more. See new tools and technologies. Register for BlackBerry® DevCon today! http://p.sf.net/sfu/rim-devcon-copy1 _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
