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On 6/11/2013 7:52 PM, Jon Elson wrote:
> 
> I think a very snazzy scheme could be cobbled up where the PRU is
> passed a "work list" of EPP registers to read/write.  Writes would
> have the data immediately following the command, reads would place
> the responses sequentially in a response buffer.  When the
> operation was completed, the ARM could then pick up the result of
> the transaction.

Yep...that's how the hostmot2 driver works now (work list of read and
write values), it would be fairly easy to port.  I'm not sure about
any of the other hal drivers.

> I can imagine it could be quite a bit faster than the parallel
> port, maybe 100 - 200 ns per byte transferred.  Handshaking might
> not be needed, just provide enough delay to make sure the clock
> synchronizers had enough time to sample the data.

Writes can easily be that fast, reads will probably be slower.  I did
some measuring on the PRU timings:

https://plus.google.com/u/0/106079792142766516843/posts/ZWZtoahMFcE

...reads take 165 nS just to execute the one instruction (memory read
of the GPIO from the PRU side), and you have to account for write to
read round-trip latency issues to make sure the timings are correct.

Writes take 10-40 nS, and there are no timing issues because the write
data is all self synchronous (ie: there is no wondering how long a
write takes to show up at the I/O pin and make it's way back through
the GPIO logic to be visible to the PRU when read).

So as usual, writes are cheap and reads are expensive.

Note the latency issues disappear if you're using PRU direct inputs,
but that restricts the I/O allocations quite a bit.

- -- 
Charles Steinkuehler
char...@steinkuehler.net
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