Hello, first of all, thanks to all etherlab-developers for their great job.
I have a question about the activation of the sync-signal generation with distributed clocks. I use the ethercatmaster 1.5.1 with the dc-patches from Graeme Foot, kernel 2.6.32.11 with rtai 3.8.1. The application is running over the rtdm-interface and the masterclock is synchronized to the reference clock in slave 1. The slaves are particular developed for us from external companies (FPGA-based designs with Beckhoff IP-Core). The synchronization of the masterclock with the reference clock, like the patches from Graeme Foot, works very well. But i see a constant phase offset between the sync0-signal and the incoming frame (SOF). With every restart of the application the offset is constant during runtime, but with another value. If the value is in a special range, i read the same input pdo values between two cycle times from the slave. To solve the problem i have to know the systemtime, the next sync0-signal is generated in the slave. Does anybody know if this time is available in a slave with dc-support ? Thank you in advance, Ralf Wiegand Ralf Wiegand T: +49 6441 207-410 F: +49 6441 207-387 E: [email protected] <mailto:[email protected]> Hexagon Metrology GmbH Siegmund-Hiepe-Str. 2-12 DE-35578 Wetzlar www.hexagonmetrology.de<http://www.hexagonmetrology.de/> | LinkedIn<http://www.linkedin.com/company/hexagon-metrology> | Facebook<http://www.facebook.com/hex.metrology> | Twitter<http://twitter.com/hexmetrology> <www.hexagonmetrology.de> Hauptgesch?ftsf?hrer: Holger Fritze Gesch?ftsf?hrer: Per Holmberg - Arno Seuren - Michael Rosenbruch Amtsgericht Wetzlar, HRB 1201
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