Axalon said: >check the "options sb" line in /etc/conf.modules for a dma16= /etc/conf.modules: alias sound sb pre-install sound insmod sound dmabuf=1 options opl3 io=0x388 alias midi awe_wave post-install awe_wave /bin/sfxload /etc/midi/GU11-ROM.SF2 options sb io=0x220 irq=5 dma=0 dma16=1 mpu_io=0x330 <should I attempt to alter the dma16=# ?> I have attached the corrupted file but am also inclosing the pertinent lines below. Basically this is from the original "rpm-save" file from the 6.0 to 6.1 upgrade. (Yes it was an upgrade which at first seemed to go smoothly!) # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy This is from the corrupt file # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy This is what I did # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if #required # Don't forget to uncomment the activate (ACT Y) when happy I hope the attached file will stay attached and if it opens up increasing the length of this post to the general readers I apologize. William Bouterse Juneau, Alaska William Bouterse Juneau, Alaska
# $Id: pnpdump.c,v 1.18 1999/02/14 22:47:18 fox Exp $ # This is free software, see the sources for details. # This software has NO WARRANTY, use at your OWN RISK # # For details of this file format, see isapnp.conf(5) # # For latest information and FAQ on isapnp and pnpdump see: # http://www.roestock.demon.co.uk/isapnptools/ # # Compiler flags: -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR # # Trying port address 0203 # Trying port address 020b # Board 1 has serial identifier 33 00 0d aa 9e 44 00 8c 0e # (DEBUG) (READPORT 0x020b) (ISOLATE PRESERVE) (IDENTIFY *) (VERBOSITY 2) (CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING # Card 1: (serial identifier 33 00 0d aa 9e 44 00 8c 0e) # Vendor Id CTL0044, Serial Number 895646, checksum 0x33. # Version 1.0, Vendor version 1.0 # ANSI string -->Creative SB32 PnP<-- # # Logical device id CTL0031 # Device supports vendor reserved register @ 0x39 # Device supports vendor reserved register @ 0x3a # Device supports vendor reserved register @ 0x3f # # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy (CONFIGURE CTL0044/895646 (LD 0 # ANSI string -->Audio<-- # Multiple choice time, choose one only ! # Start dependent functions: priority preferred # IRQ 5. # High true, edge sensitive interrupt (by default) (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 1. # 8 bit DMA only # Logical device is not a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode (DMA 0 (CHANNEL 0)) # Next DMA channel 5. # 16 bit DMA only # Logical device is not a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode (DMA 1 (CHANNEL 1)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0220 # IO base alignment 1 bytes # Number of IO addresses required: 16 (IO 0 (BASE 0x220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0330 # Maximum IO base address 0x0330 # IO base alignment 1 bytes # Number of IO addresses required: 2 (IO 1 (BASE 0x330)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0388 # Maximum IO base address 0x0388 # IO base alignment 1 bytes # Number of IO addresses required: 4 # (IO 2 (SIZE 4) (BASE 0x0388)) # Start dependent functions: priority acceptable # IRQ 5, 7 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is not a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Next DMA channel 5, 6 or 7. # 16 bit DMA only # Logical device is not a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode # (DMA 1 (CHANNEL 5)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 48 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0388 # Maximum IO base address 0x0388 # IO base alignment 1 bytes # Number of IO addresses required: 4 # (IO 2 (SIZE 4) (BASE 0x0388)) # Start dependent functions: priority acceptable # IRQ 5, 7 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is not a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Next DMA channel 5, 6 or 7. # 16 bit DMA only # Logical device is not a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode # (DMA 1 (CHANNEL 5)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 48 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Start dependent functions: priority functional # IRQ 5, 7 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is not a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Next DMA channel 5, 6 or 7. # 16 bit DMA only # Logical device is not a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode # (DMA 1 (CHANNEL 5)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Start dependent functions: priority functional # IRQ 5, 7 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is not a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 48 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0388 # Maximum IO base address 0x0388 # IO base alignment 1 bytes # Number of IO addresses required: 4 # (IO 2 (SIZE 4) (BASE 0x0388)) # Start dependent functions: priority functional # IRQ 5, 7 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is not a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 48 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Start dependent functions: priority functional # IRQ 5, 7, 10 or 11. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is not a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # End dependent functions (NAME "CTL0044/895646[0]{Audio }") (ACT Y) )) # # Logical device id CTL2011 # Device supports vendor reserved register @ 0x38 # Device supports vendor reserved register @ 0x3b # Device supports vendor reserved register @ 0x3d # # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy (CONFIGURE CTL0044/895646 (LD 1 # Compatible device id PNP0600 # ANSI string -->IDE<-- # # Multiple choice time, choose one only ! # # Start dependent functions: priority preferred # IRQ 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 10 (MODE +E))) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0168 # Maximum IO base address 0x0168 # IO base alignment 1 bytes # Number of IO addresses required: 8 # (IO 0 (SIZE 8) (BASE 0x0168)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x036e # Maximum IO base address 0x036e # IO base alignment 1 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x036e)) # # Start dependent functions: priority acceptable # IRQ 11. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 11 (MODE +E))) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x01e8 # Maximum IO base address 0x01e8 # IO base alignment 1 bytes # Number of IO addresses required: 8 # (IO 0 (SIZE 8) (BASE 0x01e8)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x03ee # Maximum IO base address 0x03ee # IO base alignment 1 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x03ee)) # # Start dependent functions: priority acceptable # IRQ 10, 11 or 15. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 10 (MODE +E))) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0100 # Maximum IO base address 0x01f8 # IO base alignment 8 bytes # Number of IO addresses required: 8 # (IO 0 (SIZE 8) (BASE 0x0100)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x03fe # IO base alignment 2 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # # Start dependent functions: priority functional # IRQ 15. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 15 (MODE +E))) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0170 # Maximum IO base address 0x0170 # IO base alignment 1 bytes # Number of IO addresses required: 8 # (IO 0 (SIZE 8) (BASE 0x0170)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0376 # Maximum IO base address 0x0376 # IO base alignment 1 bytes # Number of IO addresses required: 1 # (IO 1 (SIZE 1) (BASE 0x0376)) # # End dependent functions # (NAME "CTL0044/895646[1]{IDE }") # (ACT Y) )) # # Logical device id CTL0021 # Device supports vendor reserved register @ 0x39 # Device supports vendor reserved register @ 0x3b # Device supports vendor reserved register @ 0x3d # # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy (CONFIGURE CTL0044/895646 (LD 2 # ANSI string -->WaveTable<-- # Multiple choice time, choose one only ! # Start dependent functions: priority preferred # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0620 # Maximum IO base address 0x0620 # IO base alignment 1 bytes # Number of IO addresses required: 4 (IO 0 (BASE 0x0620)) (IO 1 (BASE 0x0A20)) (IO 2 (BASE 0x0E20)) # Start dependent functions: priority acceptable # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0620 # Maximum IO base address 0x0680 # IO base alignment 32 bytes # Number of IO addresses required: 4 # (IO 0 (SIZE 4) (BASE 0x0620)) # End dependent functions (NAME "CTL0044/895646[2]{WaveTable }") (ACT Y) )) # # Logical device id CTL7001 # Device supports vendor reserved register @ 0x38 # Device supports vendor reserved register @ 0x3b # Device supports vendor reserved register @ 0x3d # # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy (CONFIGURE CTL0044/895646 (LD 3 # Compatible device id PNPb02f # ANSI string -->Game<-- # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0200 # Maximum IO base address 0x0200 # IO base alignment 1 bytes # Number of IO addresses required: 8 (IO 0 (SIZE 8) (BASE 0x0200)) (NAME "CTL0044/895646[3]{Game }") (ACT Y) )) # # Logical device id CTL0051 # Device supports vendor reserved register @ 0x38 # Device supports vendor reserved register @ 0x3b # Device supports vendor reserved register @ 0x3d # # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy (CONFIGURE CTL0044/895646 (LD 4 # ANSI string -->StereoEnhance<-- # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0100 # Maximum IO base address 0x03f8 # IO base alignment 8 bytes # Number of IO addresses required: 1 (IO 0 (SIZE 1) (BASE 0x0100)) (NAME "CTL0044/895646[4]{StereoEnhance }") (ACT Y) )) # End tag... Checksum 0x00 (OK) # Returns all cards to the "Wait for Key" state (WAITFORKEY)
