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commit 53f1b3dd0917ea4645e553510bbc94c5574ebf56 Author: Ramiro Polla <[email protected]> AuthorDate: Mon Jul 6 20:07:29 2026 +0200 Commit: Ramiro Polla <[email protected]> CommitDate: Wed Jul 22 14:07:37 2026 +0000 swscale/aarch64/rasm: fill AArch64VecViews by value Sponsored-by: Sovereign Tech Fund Signed-off-by: Ramiro Polla <[email protected]> --- libswscale/aarch64/ops_asmgen.c | 77 +++++++++++------------------------------ libswscale/aarch64/rasm.c | 33 ++++++++++-------- libswscale/aarch64/rasm.h | 9 ++++- 3 files changed, 46 insertions(+), 73 deletions(-) diff --git a/libswscale/aarch64/ops_asmgen.c b/libswscale/aarch64/ops_asmgen.c index 5faa8166b8..09bf8f95a1 100644 --- a/libswscale/aarch64/ops_asmgen.c +++ b/libswscale/aarch64/ops_asmgen.c @@ -379,13 +379,9 @@ static void asmgen_op_read_bit(SwsAArch64Context *s, const SwsAArch64OpImplParam RasmContext *r = s->rctx; RasmOp bitmask_vec = s->vt[1]; RasmOp wtmp = a64op_w(s->tmp0); - AArch64VecViews vl[1]; - AArch64VecViews vtmp; - AArch64VecViews shift_vec; - - a64op_vec_views(s->vt[0], &shift_vec); - a64op_vec_views(s->vl[0], &vl[0]); - a64op_vec_views(s->vt[2], &vtmp); + AArch64VecViews vl[1] = { a64op_vec_views(s->vl[0]) }; + AArch64VecViews vtmp = a64op_vec_views(s->vt[2]); + AArch64VecViews shift_vec = a64op_vec_views(s->vt[0]); /* Note that shift_vec has negative values, so that using it with * ushl actually performs a right shift. */ @@ -415,11 +411,8 @@ static void asmgen_op_read_nibble(SwsAArch64Context *s, const SwsAArch64OpImplPa { RasmContext *r = s->rctx; RasmOp nibble_mask = v_8b(s->vt[0]); - AArch64VecViews vl[1]; - AArch64VecViews vtmp; - - a64op_vec_views(s->vl[0], &vl[0]); - a64op_vec_views(s->vt[1], &vtmp); + AArch64VecViews vl[1] = { a64op_vec_views(s->vl[0]) }; + AArch64VecViews vtmp = a64op_vec_views(s->vt[1]); rasm_annotate_next(r, "v128 nibble_mask = {0xf <repeats 8 times>, 0x0 <repeats 8 times>};"); i_movi(r, nibble_mask, IMM(0x0f)); @@ -459,13 +452,8 @@ static void asmgen_op_read_packed(SwsAArch64Context *s, const SwsAArch64OpImplPa static void asmgen_op_read_planar(SwsAArch64Context *s, const SwsAArch64OpImplParams *p) { RasmContext *r = s->rctx; - AArch64VecViews vl[4]; - AArch64VecViews vh[4]; - - for (int i = 0; i < 4; i++) { - a64op_vec_views(s->vl[i], &vl[i]); - a64op_vec_views(s->vh[i], &vh[i]); - } + AArch64VecViews vl[4] = A64OP_VEC_VIEWS4(s->vl); + AArch64VecViews vh[4] = A64OP_VEC_VIEWS4(s->vh); LOOP_MASK(p, i) { switch ((s->use_vh ? 0x100 : 0) | s->vec_size) { @@ -487,15 +475,10 @@ static void asmgen_op_read_planar(SwsAArch64Context *s, const SwsAArch64OpImplPa static void asmgen_op_write_bit(SwsAArch64Context *s, const SwsAArch64OpImplParams *p) { RasmContext *r = s->rctx; - AArch64VecViews vl[1]; - AArch64VecViews shift_vec; - AArch64VecViews vtmp0; - AArch64VecViews vtmp1; - - a64op_vec_views(s->vl[0], &vl[0]); - a64op_vec_views(s->vt[0], &shift_vec); - a64op_vec_views(s->vt[1], &vtmp0); - a64op_vec_views(s->vt[2], &vtmp1); + AArch64VecViews vl[1] = { a64op_vec_views(s->vl[0]) }; + AArch64VecViews shift_vec = a64op_vec_views(s->vt[0]); + AArch64VecViews vtmp0 = a64op_vec_views(s->vt[1]); + AArch64VecViews vtmp1 = a64op_vec_views(s->vt[2]); rasm_annotate_next(r, "v128 shift_vec = impl->priv.v128;"); i_ldr(r, shift_vec.q, a64op_off(s->impl, offsetof_impl_priv)); @@ -518,14 +501,9 @@ static void asmgen_op_write_bit(SwsAArch64Context *s, const SwsAArch64OpImplPara static void asmgen_op_write_nibble(SwsAArch64Context *s, const SwsAArch64OpImplParams *p) { RasmContext *r = s->rctx; - AArch64VecViews vl[4]; - AArch64VecViews vtmp0; - AArch64VecViews vtmp1; - - for (int i = 0; i < 4; i++) - a64op_vec_views(s->vl[i], &vl[i]); - a64op_vec_views(s->vt[0], &vtmp0); - a64op_vec_views(s->vt[1], &vtmp1); + AArch64VecViews vl[4] = A64OP_VEC_VIEWS4(s->vl); + AArch64VecViews vtmp0 = a64op_vec_views(s->vt[0]); + AArch64VecViews vtmp1 = a64op_vec_views(s->vt[1]); if (p->block_size == 8) { i_shl (r, vtmp0.h4, vl[0].h4, IMM(4)); @@ -564,13 +542,8 @@ static void asmgen_op_write_packed(SwsAArch64Context *s, const SwsAArch64OpImplP static void asmgen_op_write_planar(SwsAArch64Context *s, const SwsAArch64OpImplParams *p) { RasmContext *r = s->rctx; - AArch64VecViews vl[4]; - AArch64VecViews vh[4]; - - for (int i = 0; i < 4; i++) { - a64op_vec_views(s->vl[i], &vl[i]); - a64op_vec_views(s->vh[i], &vh[i]); - } + AArch64VecViews vl[4] = A64OP_VEC_VIEWS4(s->vl); + AArch64VecViews vh[4] = A64OP_VEC_VIEWS4(s->vh); LOOP_MASK(p, i) { switch ((s->use_vh ? 0x100 : 0) | s->vec_size) { @@ -589,13 +562,8 @@ static void asmgen_op_write_planar(SwsAArch64Context *s, const SwsAArch64OpImplP static void asmgen_op_swap_bytes(SwsAArch64Context *s, const SwsAArch64OpImplParams *p) { RasmContext *r = s->rctx; - AArch64VecViews vl[4]; - AArch64VecViews vh[4]; - - for (int i = 0; i < 4; i++) { - a64op_vec_views(s->vl[i], &vl[i]); - a64op_vec_views(s->vh[i], &vh[i]); - } + AArch64VecViews vl[4] = A64OP_VEC_VIEWS4(s->vl); + AArch64VecViews vh[4] = A64OP_VEC_VIEWS4(s->vh); switch (ff_sws_pixel_type_size(p->type)) { case sizeof(uint16_t): @@ -847,8 +815,8 @@ static void asmgen_op_clear(SwsAArch64Context *s, const SwsAArch64OpImplParams * static void asmgen_op_convert(SwsAArch64Context *s, const SwsAArch64OpImplParams *p) { RasmContext *r = s->rctx; - AArch64VecViews vl[4]; - AArch64VecViews vh[4]; + AArch64VecViews vl[4] = A64OP_VEC_VIEWS4(s->vl); + AArch64VecViews vh[4] = A64OP_VEC_VIEWS4(s->vh); /** * Since each instruction in the convert operation needs specific @@ -856,11 +824,6 @@ static void asmgen_op_convert(SwsAArch64Context *s, const SwsAArch64OpImplParams * each operand instead of reshaping all vectors. */ - for (int i = 0; i < 4; i++) { - a64op_vec_views(s->vl[i], &vl[i]); - a64op_vec_views(s->vh[i], &vh[i]); - } - size_t src_el_size = s->el_size; SwsPixelType to_type; switch (p->uop) { diff --git a/libswscale/aarch64/rasm.c b/libswscale/aarch64/rasm.c index abea0e8dce..b866e1d3ff 100644 --- a/libswscale/aarch64/rasm.c +++ b/libswscale/aarch64/rasm.c @@ -327,23 +327,26 @@ int rasm_new_labelf(RasmContext *rctx, char *s, size_t n, const char *fmt, ...) /*********************************************************************/ /* AArch64-specific */ -void a64op_vec_views(RasmOp op, AArch64VecViews *out) +AArch64VecViews a64op_vec_views(RasmOp op) { uint8_t n = a64op_vec_n(op); - out->b = a64op_vecb (n); - out->h = a64op_vech (n); - out->s = a64op_vecs (n); - out->d = a64op_vecd (n); - out->q = a64op_vecq (n); - out->b8 = a64op_vec8b (n); - out->b16 = a64op_vec16b(n); - out->h4 = a64op_vec4h (n); - out->h8 = a64op_vec8h (n); - out->s2 = a64op_vec2s (n); - out->s4 = a64op_vec4s (n); - out->d2 = a64op_vec2d (n); + AArch64VecViews out = { + .b = a64op_vecb (n), + .h = a64op_vech (n), + .s = a64op_vecs (n), + .d = a64op_vecd (n), + .q = a64op_vecq (n), + .b8 = a64op_vec8b (n), + .b16 = a64op_vec16b(n), + .h4 = a64op_vec4h (n), + .h8 = a64op_vec8h (n), + .s2 = a64op_vec2s (n), + .s4 = a64op_vec4s (n), + .d2 = a64op_vec2d (n), + }; for (int i = 0; i < 2; i++) - out->be[i] = a64op_elem(out->b, i); + out.be[i] = a64op_elem(out.b, i); for (int i = 0; i < 2; i++) - out->de[i] = a64op_elem(out->d, i); + out.de[i] = a64op_elem(out.d, i); + return out; } diff --git a/libswscale/aarch64/rasm.h b/libswscale/aarch64/rasm.h index ac37efed86..8b1c8efcb2 100644 --- a/libswscale/aarch64/rasm.h +++ b/libswscale/aarch64/rasm.h @@ -474,7 +474,14 @@ typedef struct AArch64VecViews { } AArch64VecViews; /* Fill vector view struct for given op. */ -void a64op_vec_views(RasmOp op, AArch64VecViews *out); +AArch64VecViews a64op_vec_views(RasmOp op); + +#define A64OP_VEC_VIEWS4(op) { \ + a64op_vec_views((op)[0]), \ + a64op_vec_views((op)[1]), \ + a64op_vec_views((op)[2]), \ + a64op_vec_views((op)[3]), \ +} /*********************************************************************/ /* AARCH64_OP_BASE */ _______________________________________________ ffmpeg-cvslog mailing list -- [email protected] To unsubscribe send an email to [email protected]
