08.12.2015 14:08, Dimitry Sibiryakov wrote:
> 08.12.2015 12:29, Vlad Khorsun wrote:
>> Note, with MSVC, when return value of _InterlockedOr() intrinsic is
>> used by the caller, compiler will
>> generate almost the same code as above (with a loop and compare_exchange).
>
> Yes, but they do it on assembler level.
Is it enough "assembler level" for you ?
169: while (true)
170: {
171: AtomicCounter::counter_type old = dbb_flags;
14EA75DF mov edx,dword ptr [esi]
172: if ((old & (DBB_sweep_in_progress |
DBB_sweep_starting)) || (dbb_ast_flags & DBB_shutdown))
14EA75E1 test edx,81000h
14EA75E7 jne Jrd::Database::allowSweepThread+66h (14EA7616h)
14EA75E9 lea esp,[esp]
14EA75F0 mov eax,dword ptr [edi+2E0h]
14EA75F6 test al,8
14EA75F8 jne Jrd::Database::allowSweepThread+66h (14EA7616h)
174:
175: if (dbb_flags.compareExchange(old, old |
DBB_sweep_starting))
14EA75FA mov ecx,edx
14EA75FC mov eax,edx
14EA75FE or ecx,80000h
14EA7604 lock cmpxchg dword ptr [esi],ecx
14EA7608 cmp eax,edx
14EA760A je Jrd::Database::allowSweepThread+6Eh (14EA761Eh)
172: if ((old & (DBB_sweep_in_progress |
DBB_sweep_starting)) || (dbb_ast_flags & DBB_shutdown))
14EA760C mov edx,dword ptr [esi]
172: if ((old & (DBB_sweep_in_progress |
DBB_sweep_starting)) || (dbb_ast_flags & DBB_shutdown))
14EA760E test edx,81000h
14EA7614 je Jrd::Database::allowSweepThread+40h (14EA75F0h)
14EA7616 pop ebx
14EA7617 pop edi
173: return false;
14EA7618 xor al,al
14EA761A pop esi
190: }
14EA761B ret 4
176: break;
177: }
>> But __sync_fetch_and_or() give us no guarantee because it perform two
>> actions which is not atomic together.
>
> It does guarantee (otherwise "atomic" in the name has no sense).
I don't know how to guarantee atomic execution of sequence of two
instructions on Intel HW.
> Assembler code produced by __atomic_fetch_or(__ATOMIC_SEQ_CST) is exactly
> the same as
> for _InterlockedOr().
You have a proof of course...
Regards,
Vlad
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