This Patch provides a unified chip driver for Firmware Hub (FWH).
It is heavily based on 80802ab.c and combines all related code from the
following:
sharplhf00l04.c
sst28sf040.c
sst49lfxxxc.c
stm50flw0x0x.c
Signed-off-by: Sean Nelson <[email protected]>
---
This is the first of 3 patches for FWH unification.
Patch 1: fwhub driver
Patch 2: connect/convert fwh drivers
Patch 3: decouple old fwh drivers
This is a Request of comments, the signoff is in case no one has any
problems ;-)
diff --git a/fwhub.c b/fwhub.c
new file mode 100644
index 0000000..b2b30bc
--- /dev/null
+++ b/fwhub.c
@@ -0,0 +1,432 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010 Sean Nelson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* This is heavily based on 80802ab.c (base) and combines all related code
from the following:
+ * sharplhf00l04.c; completely the same as base
+ * sst_fwhub.c
+ * sst28sf040.c
+ * sst49lfxxxc.c
+ * stm50flw0x0x.c
+ */
+
+/*
+ * Datasheet:
+ * - Name: Intel 82802AB/82802AC Firmware Hub (FWH)
+ * - URL: http://www.intel.com/design/chipsets/datashts/290658.htm
+ * - PDF: http://download.intel.com/design/chipsets/datashts/29065804.pdf
+ * - Order number: 290658-004
+ */
+
+#include <string.h>
+#include <stdlib.h>
+#include "fwhub.h"
+#include "flash.h"
+#include "flashchips.h"
+
+void print_status_fwhub(uint8_t status)
+{
+ printf_debug("%s", status & 0x80 ? "Ready:" : "Busy:");
+ printf_debug("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:");
+ printf_debug("%s", status & 0x20 ? "BE ERROR:" : "BE OK:");
+ printf_debug("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:");
+ printf_debug("%s", status & 0x8 ? "VP ERR:" : "VPP OK:");
+ printf_debug("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:");
+ printf_debug("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
+}
+
+int probe_fwhub(struct flashchip *flash)
+{
+ chipaddr bios = flash->virtual_memory;
+ uint8_t id1, id2;
+
+ /* Reset to get a clean state */
+ chip_writeb(RESET, bios);
+ programmer_delay(10);
+
+ /* Enter ID mode */
+ chip_writeb(READ_ID, bios);
+ programmer_delay(10);
+
+ id1 = chip_readb(bios);
+ id2 = chip_readb(bios + 0x01);
+
+ /* Leave ID mode */
+ chip_writeb(RESET, bios);
+ programmer_delay(10);
+
+ printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
+
+ if (id1 != flash->manufacture_id || id2 != flash->model_id)
+ return 0;
+
+ map_flash_registers(flash);
+
+ return 1;
+}
+
+uint8_t wait_fwhub(struct flashchip *flash)
+{
+ chipaddr bios = flash->virtual_memory;
+ uint8_t status;
+
+ chip_writeb(READ_STATUS, bios);
+ if ((chip_readb(bios) & 0x80) == 0) { // it's busy
+ while ((chip_readb(bios) & 0x80) == 0) ;
+ }
+
+ status = chip_readb(bios);
+
+ /* Reset to get a clean state */
+ chip_writeb(RESET, bios);
+
+ return status;
+}
+
+/* ***** Erase */
+int erase_block_fwhub(struct flashchip *flash, unsigned int page, unsigned int
pagesize)
+{
+ chipaddr bios = flash->virtual_memory;
+ uint8_t status;
+
+ // clear status register
+ chip_writeb(CLEAR_STATUS, bios + page);
+
+ // now start it
+ chip_writeb(ERASE_BLOCK, bios + page);
+ chip_writeb(CONFIRM, bios + page);
+ programmer_delay(10);
+
+ // now let's see what the register is
+ status = wait_fwhub(flash);
+ print_status_fwhub(status);
+
+ /* wait for Toggle bit ready */
+ toggle_ready_jedec(bios);
+
+ if (check_erased_range(flash, page, pagesize)) {
+ fprintf(stderr, "ERASE FAILED!\n");
+ return -1;
+ }
+ printf("DONE BLOCK 0x%x\n", page);
+
+ return 0;
+}
+
+int erase_sector_fwhub_32(struct flashchip *flash, unsigned int sector,
unsigned int sectorsize)
+{
+ chipaddr bios = flash->virtual_memory + sector;
+ uint8_t status;
+
+ // clear status register
+ chip_writeb(CLEAR_STATUS, bios);
+ printf_debug("Erase at 0x%lx\n", bios);
+
+ // now start it
+ chip_writeb(ERASE_SECTOR_32, bios);
+ chip_writeb(CONFIRM, bios);
+ programmer_delay(10);
+
+ // now let's see what the register is
+ status = wait_fwhub(flash);
+ print_status_fwhub(status);
+
+ if (check_erased_range(flash, sector, sectorsize)) {
+ fprintf(stderr, "ERASE FAILED!\n");
+ return -1;
+ }
+ printf("DONE BLOCK 0x%x\n", sector);
+
+ return 0;
+}
+
+int erase_sector_fwhub_30(struct flashchip *flash, unsigned int address,
unsigned int sector_size)
+{
+ uint8_t status;
+ chipaddr bios = flash->virtual_memory;
+
+ // clear status register
+ chip_writeb(CLEAR_STATUS, bios);
+ printf_debug("Erase at 0x%lx\n", bios);
+
+ chip_writeb(ERASE_SECTOR_30, bios);
+ chip_writeb(CONFIRM, bios + address);
+ programmer_delay(10);
+
+ // now let's see what the register is
+ status = wait_fwhub(flash);
+ print_status_fwhub(status);
+
+ if (check_erased_range(flash, address, sector_size)) {
+ fprintf(stderr, "ERASE FAILED!\n");
+ return -1;
+ }
+ return 0;
+}
+
+int erase_chip_sector_fwhub(struct flashchip *flash, unsigned int address,
unsigned int sector_size)
+{
+ int i;
+ unsigned int total_size = flash->total_size * 1024;
+
+ printf("total_size is %d; flash->page_size is %d\n", total_size,
sector_size);
+ printf("Erasing page:\n");
+ for (i = 0; i < total_size / sector_size; i++)
+ if (erase_sector_fwhub_30(flash, i, sector_size))
+ {
+ fprintf(stderr, "ERASE FAILED!\n");
+ return (-1);
+ }
+ printf("DONE ERASE\n");
+
+ chip_writeb(RESET, flash->virtual_memory);
+
+ return 0;
+}
+
+int erase_chip_block_fwhub(struct flashchip *flash, unsigned int address,
unsigned int sector_size)
+{
+ int i;
+ unsigned int total_size = flash->total_size * 1024;
+
+ printf("total_size is %d; flash->page_size is %d\n", total_size,
sector_size);
+ printf("Erasing page:\n");
+ for (i = 0; i < total_size / sector_size; i++)
+ if (erase_block_fwhub(flash, i * sector_size, sector_size)) {
+ fprintf(stderr, "ERASE FAILED!\n");
+ return -1;
+ }
+ printf("DONE ERASE\n");
+
+ chip_writeb(RESET, flash->virtual_memory);
+
+ return 0;
+}
+
+int erase_chip_chip_fwhub(struct flashchip *flash, unsigned int address,
unsigned int sector_size)
+{
+ chipaddr bios = flash->virtual_memory;
+
+ chip_writeb(ERASE_CHIP_30, bios);
+ chip_writeb(ERASE_CHIP_30, bios);
+
+ programmer_delay(10);
+ toggle_ready_jedec(bios);
+
+ if (check_erased_range(flash, 0, flash->total_size * 1024)) {
+ fprintf(stderr, "ERASE FAILED!\n");
+ return -1;
+ }
+ return 0;
+}
+
+/* ***** Write */
+int write_chip_fwhub_10(struct flashchip *flash, uint8_t *buf)
+{
+ int i;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
+ chipaddr bios = flash->virtual_memory;
+
+ printf("Programming page: ");
+ for (i = 0; i < total_size / page_size; i++) {
+ /* write to the sector */
+ printf("%04d at address: 0x%08x", i, i * page_size);
+ write_sector_fwhub_10(flash, buf + i * page_size,
+ bios + i * page_size, page_size);
+
printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
+ }
+ printf("\n");
+ chip_writeb(RESET, bios);
+
+ return 0;
+}
+
+int write_chip_fwhub_40(struct flashchip *flash, uint8_t *buf)
+{
+ int i;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
+ chipaddr bios = flash->virtual_memory;
+
+ printf("Programming page: \n");
+ for (i = 0; i < total_size / page_size; i++) {
+ printf("%04d at address: 0x%08x", i, i * page_size);
+
+ write_sector_fwhub_40(flash, buf + i * page_size,
+ bios + i * page_size, page_size);
+
printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
+ }
+ printf("\n");
+ chip_writeb(RESET, bios);
+
+ return 0;
+}
+
+int write_sector_fwhub_40(struct flashchip *flash, uint8_t *src, chipaddr dst,
unsigned int page_size)
+{
+ int i;
+ chipaddr bios = flash->virtual_memory;
+
+ chip_writeb(0x50, bios);
+ for (i = 0; i < page_size; i++) {
+ /* transfer data from source to destination */
+ if (*src == 0xFF) {
+ dst++, src++;
+ /* If the data is 0xFF, don't program it */
+ continue;
+ }
+
+ /*issue AUTO PROGRAM command */
+ chip_writeb(PGRM_BYTE, dst); /* could be 0x40 for 82802ab */
+ chip_writeb(*src++, dst++);
+ wait_fwhub(flash);
+
+ /* wait for Toggle bit ready */
+ toggle_ready_jedec(bios);
+ }
+ return 0;
+}
+
+int write_sector_fwhub_10(struct flashchip *flash, uint8_t *src, chipaddr dst,
unsigned int page_size)
+{
+ int i;
+ unsigned char status;
+ chipaddr bios = flash->virtual_memory;
+
+ chip_writeb(CLEAR_STATUS, bios);
+ for (i = 0; i < page_size; i++) {
+ /* transfer data from source to destination */
+ if (*src == 0xFF) {
+ dst++, src++;
+ /* If the data is 0xFF, don't program it */
+ continue;
+ }
+ /*issue AUTO PROGRAM command */
+ chip_writeb(PGRM_BYTE_ALT, bios);
+ chip_writeb(*src++, dst++);
+
+ toggle_ready_jedec(bios);
+ }
+
+ return 0;
+}
+
+/* ***** Lock */
+void protect_28sf040(chipaddr bios)
+{
+ chip_readb(bios + 0x1823);
+ chip_readb(bios + 0x1820);
+ chip_readb(bios + 0x1822);
+ chip_readb(bios + 0x0418);
+ chip_readb(bios + 0x041B);
+ chip_readb(bios + 0x0419);
+ chip_readb(bios + 0x040A);
+}
+
+void unprotect_28sf040(chipaddr bios)
+{
+ chip_readb(bios + 0x1823);
+ chip_readb(bios + 0x1820);
+ chip_readb(bios + 0x1822);
+ chip_readb(bios + 0x0418);
+ chip_readb(bios + 0x041B);
+ chip_readb(bios + 0x0419);
+ chip_readb(bios + 0x041A);
+}
+
+int write_lockbits_49lfxxxc(struct flashchip *flash, unsigned char bits)
+{
+ chipaddr registers = flash->virtual_registers;
+ int i, left = flash->total_size * 1024;
+ unsigned long address;
+
+ printf_debug("\nbios=0x%08lx\n", registers);
+ for (i = 0; left > 65536; i++, left -= 65536) {
+ printf_debug("lockbits at address=0x%08lx is 0x%01x\n",
+ registers + (i * 65536) + 2,
+ chip_readb(registers + (i * 65536) + 2));
+ chip_writeb(bits, registers + (i * 65536) + 2);
+ }
+ address = i * 65536;
+ printf_debug("lockbits at address=0x%08lx is 0x%01x\n",
+ registers + address + 2,
+ chip_readb(registers + address + 2));
+ chip_writeb(bits, registers + address + 2);
+ address += 32768;
+ printf_debug("lockbits at address=0x%08lx is 0x%01x\n",
+ registers + address + 2,
+ chip_readb(registers + address + 2));
+ chip_writeb(bits, registers + address + 2);
+ address += 8192;
+ printf_debug("lockbits at address=0x%08lx is 0x%01x\n",
+ registers + address + 2,
+ chip_readb(registers + address + 2));
+ chip_writeb(bits, registers + address + 2);
+ address += 8192;
+ printf_debug("lockbits at address=0x%08lx is 0x%01x\n",
+ registers + address + 2,
+ chip_readb(registers + address + 2));
+ chip_writeb(bits, registers + address + 2);
+
+ return 0;
+}
+
+int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
+{
+ chipaddr wrprotect = flash->virtual_registers + 2;
+ const uint8_t unlock_sector = 0x00;
+ int j;
+
+ /*
+ * These chips have to be unlocked before you can erase them or write
+ * to them. The size of the locking sectors depends on the type
+ * of chip.
+ *
+ * Sometimes, the BIOS does this for you; so you propably
+ * don't need to worry about that.
+ */
+
+ /* Check, if it's is a top/bottom-block with 4k-sectors. */
+ /* TODO: What about the other types? */
+ if ((offset == 0) ||
+ (offset == (flash->model_id == ST_M50FLW080A ? 0xE0000 : 0x10000))
+ || (offset == 0xF0000)) {
+
+ // unlock each 4k-sector
+ for (j = 0; j < 0x10000; j += 0x1000) {
+ printf_debug("unlocking at 0x%x\n", offset + j);
+ chip_writeb(unlock_sector, wrprotect + offset + j);
+ if (chip_readb(wrprotect + offset + j) !=
unlock_sector) {
+ printf("Cannot unlock sector @ 0x%x\n",
+ offset + j);
+ return -1;
+ }
+ }
+ } else {
+ printf_debug("unlocking at 0x%x\n", offset);
+ chip_writeb(unlock_sector, wrprotect + offset);
+ if (chip_readb(wrprotect + offset) != unlock_sector) {
+ printf("Cannot unlock sector @ 0x%x\n", offset);
+ return -1;
+ }
+ }
+
+ return 0;
+}
diff --git a/fwhub.h b/fwhub.h
new file mode 100644
index 0000000..39b40d8
--- /dev/null
+++ b/fwhub.h
@@ -0,0 +1,71 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010 Sean Nelson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __FWH_H__
+#define __FWH_H__ 1
+
+/*
+ * Contains the generic FWH headers
+ */
+/* Read Electronic Signature */
+#define READ_ID 0x90
+#define READ_ID_ALT 0x98
+
+/* RES Register Addresses */
+#define ADDR_MFG_ID 0x00
+#define ADDR_DEV_ID 0x01
+#define ADDR_BLOCK_LOCK 0x02
+#define ADDR_MASTER_LOCK 0x03
+
+/* Program */
+#define PGRM_BYTE 0x40
+#define PGRM_BYTE_ALT 0x10
+
+/* Erase */
+#define ERASE_BLOCK 0x20
+#define ERASE_CHIP_80 0x80
+#define ERASE_CHIP_30 0x30
+#define ERASE_SECTOR_32 0x32
+#define ERASE_SECTOR_30 0x30
+
+/* Status Register */
+#define CLEAR_STATUS 0x50
+#define READ_STATUS 0x70
+
+/* Status Bit Fields */
+#define STATUS_WSMS (1 << 7)
+#define STATUS_ESS (1 << 6)
+#define STATUS_ES (1 << 5)
+#define STATUS_PS (1 << 4)
+#define STATUS_VPPS (1 << 3)
+#define STATUS_PSS (1 << 2)
+#define STATUS_DPS (1 << 1)
+#define STATUS_BPS (1 << 1)
+
+/* Program / Erase Control */
+#define SUSPEND 0xB0
+#define RESUME 0xD0
+#define CONFIRM 0xD0
+#define RESET 0xFF
+
+/* Error codes */
+#define FWH_GENERIC_ERROR -1
+#define FWH_INVALID_OPCODE -2
+
+#endif /* !__FWH_H__ */
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