On 17.01.2010 01:55, Uwe Hermann wrote: > Here's the first draft. It does not yet work, the chip cannot be > detected, all reads return 0x00 so far. > > Note that the WE# pin is at 3.3V while the HPT card is powered, thus > writes are _dis_abled, unless I'm mistaken. The WE# pin is connected to > some pin of the HPT370A chip (probably a GPIO), so it can in theory > toggle the WE# pin. >
That would explain why you don't get any probe response. An interesting experiment would be to write some random image to the chip with a known good programmer (your mainboard?), then force read the chip in the HPT360. If that works, you only have to handle WE#. If it doesn't, there are deeper issues that need to be fixed. > Index: Makefile > =================================================================== > --- Makefile (revision 862) > +++ Makefile (working copy) > @@ -84,6 +84,9 @@ > # Always enable SiI SATA controllers for now. > CONFIG_SATASII ?= yes > > +# Always enable Highpoint (HPT) ATA/RAID controllers for now. > +CONFIG_ATAHPT ?= yes > + > # Always enable FT2232 SPI dongles for now. > CONFIG_FT2232SPI ?= yes > > Following the policy of merging code early as long as users won't trip over it, change CONFIG_ATAHPT to default to no, and the patch is Acked-by: Carl-Daniel Hailfinger <[email protected]> If you merge the current tree with your patch, a conflict will arise in flashrom.c. Suggested resolution: #if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+ATAHPT_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT > 1 Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers." _______________________________________________ flashrom mailing list [email protected] http://www.flashrom.org/mailman/listinfo/flashrom
