On Sun, 30 Jun 2013 22:51:40 +0200 Stefan Tauner <[email protected]> wrote:
> On Sun, 30 Jun 2013 19:24:57 +0200 > Reiner Luett <[email protected]> wrote: > > > Hello, > > > > I've pasted the output to: > > > > http://paste.flashrom.org/view.php?id=1675 > > > > I tried a reboot after I've change the image and sometimes it worked as > > before, but in a few cases it fails. This also could be due to a faulty > > flashrom image. > > Hi, > > can you please upgrade flashrom to the latest development version? > See http://flashrom.org/Downloads#Installation_from_source > > That alone will probably not change much, but the verbose output would > be more interesting to me. If my hypothesis is correct, then forcing a > slower SPI clock might help. You can try the following patch to > verify that: > https://github.com/stefanct/flashrom/commit/480fca837b9a8b0711b8371d7ce7acf7c8d357b5 Alternatively you can also try the attached patch, which does also change the SPI clock frequency but allows the user to specify the frequency. See commit note for details. This one is untested but similar to the other one and simple enough that i think it is quite safe for you to test. You seem to be able to recover from failing boots. Do you have an external programmer or spare chips? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner
>From 9720b4d722684a8036fad9af2821efc068111c9f Mon Sep 17 00:00:00 2001 From: Stefan Tauner <[email protected]> Date: Mon, 1 Jul 2013 00:59:26 +0200 Subject: [PATCH] sbxxx: Add spispeed parameter. Allow to set the SPI clock frequency on SB600 et al. with a programmer parameter. The default is to not change the preset value. If the parameter is given (and matches a possible value), fast reads are disabled and the SPI clock is set. Example: ./flashrom -p internal:spispeed=33 -V Possible values for spispeed are "66/reserved", "33", "22", "16.5". Signed-off-by: Stefan Tauner <[email protected]> --- TODO: manpage Signed-off-by: Stefan Tauner <[email protected]> --- sb600spi.c | 48 ++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 6 deletions(-) diff --git a/sb600spi.c b/sb600spi.c index a5c00d8..8494470 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -23,6 +23,8 @@ #if defined(__i386__) || defined(__x86_64__) +#include <string.h> +#include <stdlib.h> #include "flash.h" #include "programmer.h" #include "hwaccess.h" @@ -205,14 +207,40 @@ static const struct spi_programmer spi_programmer_sb600 = { .write_aai = default_spi_write_aai, }; +struct spispeed { + const char *const name; + const int8_t speed; +}; + int sb600_probe_spi(struct pci_dev *dev) { struct pci_dev *smbus_dev; uint32_t tmp; uint8_t reg; - static const char *const speed_names[4] = { - "66/reserved", "33", "22", "16.5" + int8_t spispeed_idx = -1; + static const struct spispeed spispeeds[] = { + { "66/reserved", 0x00 }, + { "33", 0x01 }, + { "22", 0x02 }, + { "16.5", 0x03 }, }; + + char *spispeed = extract_programmer_param("spispeed"); + if (spispeed != NULL) { + int i; + for (i = 0; i < ARRAY_SIZE(spispeeds); i++) { + if (!strcasecmp(spispeeds[i].name, spispeed)) { + spispeed_idx = i; + break; + } + } + if (spispeed_idx < 0) { + msg_perr("Error: Invalid spispeed value: '%s'.\n", spispeed); + free(spispeed); + return 1; + } + free(spispeed); + } /* Read SPI_BaseAddr */ tmp = pci_read_long(dev, 0xa0); @@ -243,9 +271,17 @@ int sb600_probe_spi(struct pci_dev *dev) * Set bit 5, otherwise SPI accesses are pointless in LPC mode. * See doc 42413 AMD SB700/710/750 RPR. */ - msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", - tmp & 0x1, (tmp & 0x20) >> 5); - tmp = mmio_readl(sb600_spibar); + msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", tmp & 0x1, (tmp & 0x20) >> 5); + + if (spispeed_idx >= 0) { + msg_pdbg("Setting SPI clock to %s MHz (0x%x) and disabling fast reads...", + spispeeds[spispeed_idx].name, spispeeds[spispeed_idx].speed); + mmio_writeb((mmio_readb(sb600_spibar + 0xd) & ~(0x3 << 4)) | (0x3 << 4), sb600_spibar + 0xd); + mmio_writel(mmio_readl(sb600_spibar + 0x0) & ~(0x1 << 18), sb600_spibar + 0x0); + msg_pdbg(" done\n"); + } + + tmp = mmio_readl(sb600_spibar + 0x0); /* FIXME: If SpiAccessMacRomEn or SpiHostAccessRomEn are zero on * SB700 or later, reads and writes will be corrupted. Abort in this * case. Make sure to avoid this check on SB600. @@ -258,7 +294,7 @@ int sb600_probe_spi(struct pci_dev *dev) (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; - msg_pdbg("NormSpeed is %s MHz\n", speed_names[tmp]); + msg_pdbg("NormSpeed is %s MHz\n", spispeeds[tmp].name); /* Look for the SMBus device. */ smbus_dev = pci_dev_find(0x1002, 0x4385); -- Kind regards, Stefan Tauner
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