Hi Sean, > 1) I'm completely unable to access any SPI chips. This appears to be > due to a bug in the kernel driver, which always yanks the CS line high > despite the cs_change set to 0. A workaround I've come up with is to do > everything as a single transaction, which seems to fix the problem on my > device:
what you describe should be impossible, theoretically. CS high means do nothing. If it stays that way it wouldn't matter if you do everything in a single long "do nothing" or in separate shorter ones. So... how do you sample the CS line? And at which speed do you run the SPI bus? i.e. the `spispeed` parameter to flashrom's linux_spi driver. If you didn't set any, it might just be too fast. > 2) The other issue is that my device appears to want SPI_MODE_1. When I > set SPI_MODE_1, it is able to detect and program the board, but fails to > verify. The image that gets loaded still works, but I'm unsure of > what's causing the issue. What device is it? Nico _______________________________________________ flashrom mailing list flashrom@flashrom.org https://mail.coreboot.org/mailman/listinfo/flashrom
