On Mon, Mar 2, 2009 at 10:15 AM, Nathan Cain <[email protected]>wrote:
> I am wondering what work is being done/planned for targeting FPGA > platforms. My interests overlap with this field, and I would like to > contribute towards such an effort. I have experience with quite a few "non > traditional" HDLs, and would like to help OMeta to grow into the first > "meta" design language. I would like to be kept in the loop. I started looking into higher level HDLs and took some notes [1], but did not get very far. I will be refreshing my VHDL knowledge within the next month for a project at school and would love to also discuss how to take things "higher level". I wonder if IS (see STEPS [2]) could be made to target FPGAs -- in fact, this might almost be an ideal situation if I understand IS correctly. (I am not sure how OMeta compares to IS.) I think developing a higher level HDL is a fantastic idea and almost * required* to research what "mega-core" processors should look like. People who are trying to figure out parallel programming "languages" without understanding HDLs are, well, an enigma to me. The "orthogonalization" that the VPRI folks are working on (see [2]) seems like it will also be crucial. I have not found anyone *else* trying to break programs down in a truly interesting way. Luke [1] http://luke.breuer.com/time/item/Lukes_FPGA_work/327.aspx [2] http://www.vpri.org/pdf/tr2007008_steps.pdf
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