Gerardo Richarte wrote on Tue, 03 Mar 2009 09:14:50 -0200 > Hi Ian, > > Ian Piumarta wrote: > > I'd love to see somebody figure out how to dynamically generate bit > > files from an intermediate representation (Jolt ASTs, for example) to > > allow reprogramming of the hardware on the fly. > Take a look at project Madeo > (http://www.esug.org/Conferences/2008/Innovation+Technology+Awards/Submissions) > If I correctly recall from their ESUG presentation, they could generate > bit files for some specific FPGAs, and all their work was Smalltalk based.
This is a very impressive project! A more limited one, also implemented in VisualWorks Smalltalk, is the "Interactive Design and Simulation System" http://www.xs4all.nl/~averschu/idass/ This lets you describe and simulate digital systems with a combination of graphical and simple text notations. When you are done, you can use the "alien" translator to generate Verilog files that can be used, for example, to program an FPGA development board. The rules-based text to text translator used for this could probably be done far more efficiently in OMeta. A friend of mine, Reinaldo Silveira, was very interested in the parallels between hardware blocks wired together and software objects sending messages to each other. He initially investigated Java for his PhD thesis, then played around with Squeak and did some complete system simulations and then finally decided to extend Self into a SelfHDL. Unfortunately, all of his work is in Portuguese. The pictures in his thesis or on page 6 of this paper can give even those who can't read his texts an idea of how he exteded Morphic: http://www.iberchip.org/IX/Articles/PAP-046.pdf He was particularly fascinated with how all the process related stuff in Self is implemented in the language with a single primitive (TWAINS - transfer and wait for interrupt or signal) so that he could integrate the operation of "normal" code with his simulation framework. My own master's project is called "Adaptive Compilation for Reconfigurable Computers in Mobile Robotics" and is also based on the idea that hardware and objects can be made to look the same. The initial hardware configuration will be six SiliconSqueak processors running a software-only implementation of the application. Note that this is not a sequential Smalltalk-80 program, but is divided into parts that communicate with each other using a given protocol (see stream based programming). After the app is running for a while, the most critical parts of the code can be recompiled (using type feedback) to increase their performance. If some part of even the optimized code remains a major hotspot, then it would be recompiled a second time but now into dedicated hardware which would replace one of the six SiliconSqueak cores (this is a Virtex-4 FPGA which can be partially reconfigured while the rest continues to operate normally). Eventually this hardware might get changed back to a general processor or else a second processor might get replaced with a different dedicated hardware block (leaving just four processors for the software part), depending on the current needs of the application. Sadly all my texts (except for the robot vision parts) are also in Portuguese. There are two obvious problems with compiling software blocks into hardware: it would take a very long time and the actual bits for the FPGA can only be generated with closed tools running on a PC (and not on the FPGA hardware itself). So I will have to cheat and have to pre-compile a library of key blocks which the FPGA will then load as needed. In this case it isn't really adaptive compilation anymore but more like the hardware "executables" as in Borph - http://www.eee.hku.hk/~hso/publications.html The key thing is to have some model of parallelism which is used by the source code. If you try to extract automatically parallelism from "normal" application code you will just make things needlessly complicated for yourself. -- Jecel _______________________________________________ fonc mailing list [email protected] http://vpri.org/mailman/listinfo/fonc
