Thanks everyone for your replies! I have a wonderful reading list going. I'd especially like to thank Ian for pointing out the Chuck Thacker chapter in Points of View, this is *wonderful*. I don't usually skip ahead in a book this good, but it was worth it this time...
Since I've never thought much about designing a processor, I thought it might be good to make some priorities out of my list of design forces. I suppose I could probably type that Verilog in and get started that way. But I wouldn't understand the Verilog as well if I did it that way, I don't think. I have a pretty strong feeling I'm going to revisit it when I start thinking about architecture in earnest, because it is a really gorgeous little design. As architecture is going to have to inform any choices I might make about speed, I know I don't want to worry *too* much about performance before I have a working architectural model. I also don't know quite what my ideal arches look like just yet, and so I made a decision to avoid making architectural decisions as well until I have a better sense of what I want. This left me with parsimony. "I know how to do that!" I thought. Dug in and fired up all the random tools and stared blinking at the screen. Okay, so a touch of architecture first then. My only goals for the first design will be: a) make it work b) make it small c) make it simple d) make it cheap Since I'm putting blinders on to high architecture and performance concerns for the time being, I thought it would be fun to try doing a OISC. I followed links along until I sensed that what I wanted for my exploration of parsimony was a "transport triggered" architecture, where instead of having instructions, registers all have various "meanings" and when you put data in them, computation is triggered as a result. I kind of liked the idea because for some reason it almost-but-not-quite reminds me of sending a message to an object... it's just that the object is a real object! And one only has so many of them to work with. It's also nice because the ABI only needs one operation, and you can drop in new function modules without much reworking (I *think*.) I went looking for examples of transport triggered architectures and found myself feeling somewhat awe-inspired by this *cool* cellular automaton, which I thought I'd share in case anyone hadn't seen it. It's called the "Wireworld Computer": http://www.quinapalus.com/wi-index.html -- Casey Ransberger
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