On Tue, Jul 26, 2011 at 3:26 PM, Josh Gargus <j...@schwa.ca> wrote: > > On Jul 26, 2011, at 6:34 AM, John Zabroski wrote: > > > > On Tue, Jul 26, 2011 at 6:26 AM, Bert Freudenberg <b...@freudenbergs.de>wrote: > >> On 26.07.2011, at 02:17, John Zabroski wrote: >> >> > 99% of the chip space on GPUs these days is devoted to 3D, and chip >> space for 2D primitives have shrunk expontentially in the last 15 years. >> >> Graphics hardware nowadays has (almost?) no fixed-function parts anymore. >> It turned into a general-purpose SIMD coprocessor. >> >> - Bert - >> > > The state of the art in linear algebra is such that a general-purpose SIMD > coprocessor IS the hardware interface for 3D abstraction. > > > This doesn't make any sense to me. Just because 3D today increasingly > targets general-purpose SIMD coprocessors doesn't imply that those SIMD > coprocessors are only suitable for 3D. Unlike your original assertion, when > doing 2D you'll still be using all of those SIMD elements (99% of the chip > won't be idle). > >
Graphics hardware has continuously evolved from "specific" to "general". 3D is a generalization of 2D where the z plane is constant. Libraries like SDL still use hardware that has been generalized for better performance with 3D, even if it does not support 3D abstractions. > > > This could change in the future to be more general purpose. For example, > hardware-based computations using quaternions and octonions. As far as I am > aware, it isn't done today for purely mathematical reasons; no one knows > how. And as far as I'm aware, such a mathematical breakthrough would be > huge, but not something graphics vendors would pursue/fund, since it is > "basic research" that can't be patented and so all graphics processors would > get the same speedup. [1] > > > http://en.wikipedia.org/wiki/Quaternion > > Given two quaternions, it's trivial to write a GPU program to compute eg: > their Hamilton product. I'm not sure what you mean by "hardware-based > quaternions"... quaternions are an algebraic entity whose defining products > are easily and naturally implementable on a SIMD. > > The hardware would support special acceleration (perhaps internally) for linear transformations in 3D space. Different hardware may not require a change for the programmer, but if the programmer (or compiler assisting the programmer) can describe the structure of the computation, then the hardware might be able to take advantage of it. The hardware might also be able to trace repeated executions and dynamically discover structure from patterns of communication.
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