On Wed, Dec 14, 2011 at 10:09:20PM -0300, Jecel Assumpcao Jr. wrote: > I was at a talk where Intel was showing their new multicore direction > and the guy kept repeating how the academic people really should be > changing their courses to teach their students to deal with, for > example, four cores. At the very end he showed an experimental 80 core > chip and as he ended the talk and took questions he left that slide up. > When it was my turn to ask, I pointed to the 80 core chip on the screen > and asked if programming it was exactly the same as on a quad core. He > said it was different, so I asked if it wouldn't be better investment to
Of course it's different; globally coherent memories don't scale with fermionic computers in a relativistic universe. The latest boondoggle in the let's-keep-investing-into-expensive-illusions is transactional memory in the mainstream. I was hoping for AMD to step forward with TSV-stacked memories in their APUs, but that's probably not going to happen now that's they're fighting for survivial. Will nVidia do it? > teach the students to program the 80 core one instead? He said he didn't > have an answer to that. It's remarkable how few are using MPI in practice. A lot of code is being made multithread-proof, and for what? So that they'll have to rewrite it for message-passing, again? _______________________________________________ fonc mailing list [email protected] http://vpri.org/mailman/listinfo/fonc
