This message is from the T13 list server.

Hale,

I don't see this as a subject for T13 to tackle. The problem is with 
the genesis of the "IDE Busmaster" and "PCI IDE" controller specs 
that someone sort of released a long time ago, but I don't think were 
ever formally adopted or published by any standards body. (Please 
correct me if I'm wrong - I don't know if the PCI-SIG adopted it or 
not) I'm under the impression that the entity which initially wrote 
the spec more or less withdrew it.

Unfortunately, what was written and worse, what wasn't written, was 
taken to heart by a number of silicon vendors who then proceeded to 
produce controllers which filled in the blanks in a variety of ways.

In my opinion, the design of these devices are pretty ill-conceived 
in any number of ways. To begin with, they are sort of in between a 
multi-function device and not. There are no standards by which the 
controller's timing can be adjusted or capabilities even discovered, 
how interrupts are controlled, detected and propagated to the host, 
unduly stupid DMA engines with silly alignment restrictions in both 
the memory and DMA command tables, no separate DMA interrupt signal 
so that DMA chains of arbitrary length can be run in separate 
segments, and well, I could go on.

The operation of these controllers in many cases requires a sequence 
of events which are contrary to what is published in the ATA 
standards documents anyway.

Hale, I'd take it up with whoever is in control of this controller 
spec or non-spec and that's clearly not T13.

IMHO, T13 should concentrate on host-device and device-device 
interactions and leave the implementation of stuff behind the ATA bus 
on the host or device to the builder of said things, including the 
format of partitions, BIOS extensions, DMA engines and so on. These 
are all platform, OS and hardware vendor specific features.


At 4:43 PM -0700 2/14/02, Hale Landis wrote:
>This message is from the T13 list server.
>
>
>I am going to give up on trying to get any kind of reliable
>indication of how much data has been transferred by a host DMA
>engine.  It is clear to me that many of you can not see the
>difference between status that says "the DMA engine is active"
>and status that says how much data has been transferred by that
>DMA engine.  I can only assume you must have the same problem
>with those car fuel tank idiot lights and fuel tank gauges.  The
>light tells you if the tank is not empty or if it is empty (the
>DMA engine is not active or it is active).  The gauge tells you
>how much fuel is in the tank (how much data has been transferred
>by the DMA engine).  If you want to build toy computers then
>don't provide the the "how much" status and continue to think
>that an "active" bit is all the host needs to determine how much
>of the host I/O buffer data has been used.
>

-- 

---------------------
I make stuff go.
---------------------

Larry Barras
Apple Computer Inc.
1 Infinite Loop
MS:  306-2TC
Cupertino, CA  95014
(408) 974-3220
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