This message is from the T13 list server.
On Fri, 8 Mar 2002 12:30:35 -0800, Eschmann, Michael K wrote: >This message is from the T13 list server. >Hale, >What would be the scope of the drive responding with a data value of 0x33cc >or 0xcc33? Does this happen only if the data read immediately follows the >writing of the device/head register, or is this going to happen all the >time? I think I said the device shall respond to a read of the Data register with this value anything the Data register is read and the device status is BSY=0 DRQ=0. >As for the cycle counting problem, how feasible would it be for the device >to make the number of words transferred available after data transfer >completes? This could be accomplished through a read of a device register >that is undefined at completion of data transfers? A 48-bit LBA command to an ATA device could tranfer up to 65536 sectors (OK, that value might fit into the registers like CH/CL at the end of the command). A 48-bit LBA command can transfer up to 33Mbytes (and I guess that could also fit into the registers after a command). But ATA devices are not really the problem... ATAPI is the problem... A single PACKET command could transfer huge amounts of data, perhaps even multiple Gbytes. Ooops, what is the limit in today's stupid PCI bus host adapters? Is it something like (65536 bytes) * (max PRDs allowed), something like (65536*8192)= 536870912 bytes (536+Mbytes)? >Drive folks, how >feasible is this? A single bit in status (for example, bit 1) could >indicate any data versus no data was transferred. OK, this would be good for ATA and ATAPI devices. Sort of a very partial solution. *** Hale Landis *** www.ata-atapi.com ***
